Three-dimensional semiconductor storing device and formation method thereof

A storage device and semiconductor technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve problems such as product reliability reduction and process instability

Active Publication Date: 2011-09-21
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, since the previous new structure leads to limitations such as process instabilit...

Method used

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  • Three-dimensional semiconductor storing device and formation method thereof
  • Three-dimensional semiconductor storing device and formation method thereof
  • Three-dimensional semiconductor storing device and formation method thereof

Examples

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no. 1 example

[0030] figure 1 is a plan view of a three-dimensional semiconductor memory device according to an embodiment of the inventive concept. Figure 2A is showing figure 1 A perspective view of part A. image 3 is showing Figure 2A Magnified view of part B. The three-dimensional semiconductor memory device may be a nonvolatile memory device.

[0031] refer to figure 1 and 2A , the first gate stack and the second gate stack may be disposed on a semiconductor substrate (hereinafter referred to as substrate) 100 laterally spaced apart from each other. The substrate 100 may be a silicon substrate, a germanium substrate or a silicon-germanium substrate. The substrate 100 may be doped with a first type dopant. For example, a well region doped with a first type dopant may be formed in the substrate 100 .

[0032] The first gate stack may include a first dielectric pattern 105a and first gates CG1 and SSG, the first dielectric pattern 105a and the first gates are alternately and r...

no. 2 example

[0109] Figure 8is a plan view illustrating a three-dimensional semiconductor memory device according to another embodiment of the inventive concept. Figure 9A is showing Figure 8 Perspective view of part C.

[0110] refer to Figure 8 and Figure 9A , the first gate stack and the second gate stack on the substrate 200 may extend side by side along the first direction. The substrate 200 may be a silicon substrate, a germanium substrate or a silicon germanium substrate. The substrate 200 may be doped with a first type dopant. The first gate stack may include alternately and repeatedly stacked first dielectric patterns 205a and first gates CGa1 and SSGa, and the second gate stack may include alternately and repeatedly stacked first gates CGa1 and SSGa on the substrate 200. The second dielectric pattern 205b on one side of the stack and the second gates CGa2 and GSGa.

[0111] The first gates CGa1 and SSGa included in the first gate stack may include a stacked plurality ...

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PUM

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Abstract

The invention discloses a three-dimensional semiconductor storing device and a formation method thereof. A nonvolatile storing device comprises a string of a nonvolatile storing unit on a substrate. The string of the nonvolatile storing unit comprises a first vertical overlapped element of the nonvolatile storing unit on the substrate and a string selecting transistor on the first vertical overlapped element or the nonvolatile storing unit. A second vertical overlapped element is also arranged on the substrate, and a grounding selecting transistor is arranged on the second vertical overlapped element of the nonvolatile storing unit. The second vertical overlapped element of the nonvolatile storing unit is arranged close to the first vertical overlapped element of the nonvolatile storing unit. A junction doped semiconductor area is arranged in the substrate. The junction doped area electrically connects the first vertical overlapped element of the nonvolatile storing unit with the second vertical overlapped element of the nonvolatile storing unit in series, so that the overlapped elements can work as a string of an individual NAND storing unit.

Description

[0001] This application claims priority from Korean Patent Application No. 10-2010-0018882 filed on Mar. 3, 2010, the disclosure of which is incorporated herein by reference. technical field [0002] The present invention relates to a semiconductor device, and more particularly, to a nonvolatile semiconductor memory device. Background technique [0003] As the electronic industry develops higher, the integration density of semiconductor devices gradually increases. A higher degree of integration of semiconductor devices is an important factor in determining product prices. In other words, as the integration density of semiconductor devices increases, the product price of semiconductor devices decreases. Therefore, demand for higher integration semiconductor devices is increasing. Typically, since the degree of integration of a semiconductor device is mainly determined by an area occupied by a unit memory cell, the degree of integration is greatly affected by fine pattern f...

Claims

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Application Information

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IPC IPC(8): H01L27/115H01L23/528H01L21/8247H01L21/768
CPCH01L27/11582H01L27/11551H01L27/11578H01L27/11556H10B41/20H10B41/27H10B43/20H10B43/27H01L27/0688H10B43/35
Inventor 孙龙勋李明范黄棋铉白昇宰金重浩
Owner SAMSUNG ELECTRONICS CO LTD
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