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Double-processor borne computer

A technology of on-board computer and dual processors, applied in the field of data processing, to achieve the effect of eliminating single point of failure, ensuring stability and avoiding crossover

Inactive Publication Date: 2011-07-13
HARBIN INST OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The present invention proposes a dual-processor on-board computer in order to solve the unavoidable ping-pong switching problem existing in the arbitration method of the existing dual-processor on-board computer and the problem of ping-pong power grab

Method used

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Examples

Experimental program
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specific Embodiment approach 1

[0018] Embodiment 1: The dual-processor on-board computer described in this embodiment is an on-board computer with an arbitration module, and the on-board computer is composed of a master computer, a slave computer, a power supply and an arbitration module, an IO module, and a backplane. The main computer, the slave computer, the power supply and the arbitration module and the IO module are all fixed on the base plate, and the control enabling signal line, the power supply line, the master CPU data address bus and the slave CPU data address bus are fixed on the base plate, so The power supply and the arbitration module are composed of a DC / DC power conversion module for the main CPU, a DC / DC power conversion module and an arbitration module for the CPU; a DC / DC power conversion module is used for the CPU; the main computer includes a main CPU module and a main The IO control module of the CPU, the DC / DC power conversion module for the main CPU provides isolated DC power supply...

specific Embodiment approach 2

[0031] Specific implementation mode two: see figure 2This embodiment will be described. This embodiment is to further limit the dual-processor on-board computer described in Embodiment 1. The satellite-arrow separation signal in this embodiment is realized by the following hardware circuit: the circuit includes a magnetic latching relay, a plurality of diodes and a plurality of Composed of resistors, wherein, the first coil of the magnetic latching relay and the current limiting resistor are connected in series between the positive pole of the coil power supply and the star-arrow separation signal HJFL, the coil is connected in series with two diodes to form a coil protection discharge circuit, and the coil corresponds to The moving contact of the first group of single-pole double-throw switches is the output terminal of the star-arrow separation signal. The normally closed static contacts of the first group of single-pole double-throw switches are connected to the ground of ...

specific Embodiment approach 3

[0035] Specific implementation mode three: see image 3 This embodiment will be described. This embodiment is a further limitation of the dual-processor on-board computer described in Embodiment 1. The enabling signal of the ground remote control automatic cutting machine in this embodiment is realized by the following hardware circuit: the circuit is composed of a magnetic latching relay and a multiple One end of the magnetic latching relay is connected to the positive pole of the coil power supply through a current limiting resistor, and the other end of the coil is connected to the anodes of three diodes at the same time, and the cathodes of the three diodes are respectively connected. It is the output terminal of the self-cutting machine enable signal, the output terminal of the power-on reset signal and the output terminal of the system reset signal; the first coil and two diodes are connected in series to form a coil protection discharge circuit; The moving contact is t...

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Abstract

The invention discloses a double-processor borne computer which relates to a double-processor technology applied in the aerospace field. The double-processor borne computer solves the problem that ping pong switch and ping-pong right robbing are difficult to avoid in the arbitration method in a borne computer of the traditional double-processor borne computer. A master computer, a slave computer,a power supply, an arbitration module and an IO module of the double-processor borne computer are all fixed on a base plate and connected mutually through data address buses, signal wires and power wires on the base plate, wherein the logical relation of the arbitration module is that: the working condition of the master computer is that an star arrow separation signal is ineffective, an output enable signal of the slave computer is ineffective, and a ready signal of the master computer is effective, or a remote control switch master computer signal is effective; and the working condition of the slave computer is that: an output enable signal of the master computer is ineffective, a generator tripping enable flag is effective, a ready signal of the master computer is ineffective, and a ready signal of the master computer is effective; or an automatic generator tripping signal of the master computer is effective, and the generator tripping enable flag is effective; or a remote control switch slave computer signal is effective.

Description

technical field [0001] The invention relates to the technical field of data processing, in particular to a dual processor for aerospace applications, an on-board computer with autonomous arbitration, automatic switching, and automatic power-off configurations and an implementation method thereof. Background technique [0002] With the continuous advancement of micro-spacecraft technology, the functions of modern small satellites have been continuously enhanced while their volume, weight, cost and power consumption have been continuously reduced. It is required that the existing on-board computer can not only integrate a large number of hardware circuits and computing units on a single chip, but also be able to flexibly configure the computer's internal circuit structure and external interfaces according to task requirements, so as to have powerful computing capabilities and a high degree of integration. [0003] During the working process of the existing dual-processor on-bo...

Claims

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Application Information

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IPC IPC(8): G06F15/80
Inventor 兰盛昌马玉海于文进潘瑞张锦绣张相宇丁玉叶
Owner HARBIN INST OF TECH
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