Dynamic comparator circuit of super-speed flash type analog-to-digital converter

Abstract

The invention belongs to the technical field of analog integrated circuit designs, in particular to a dynamic comparator circuit of a super-speed flash type analog-to-digital converter. The circuit comprises a double-tail latching comparator and a dynamic disorder cancellation circuit. The circuit operation is divided into the following four steps: disorder storage, input signal storage, comparison and reset. Compared with the traditional latching comparator, the double-tail latching comparator can operate under the state of super high frequency. The dynamic comparator has the advantages that the dynamic cancellation of disorder voltages is eliminated without a preposing amplifier, thus the power consumption is reduced greatly; and in addition, the overdrive voltage of an input transistor is independent of the input common-mode voltage and threshold voltage of the input transistor, so the overdrive voltage of the input transistor can be optimized to further reduce the random disorder voltage. By utilizing the dynamic comparator circuit provided by the invention, the comparison of a super speed signal can be realized with lower power consumption, and moreover, high resolution ratio can be realized.

Description

technical field [0001] The invention belongs to the technical field of analog integrated circuit design, and in particular relates to a dynamic comparator circuit of an ultra-high-speed flash analog-to-digital converter. Background technique [0002] The analog-to-digital converter is an important part of the mixed-signal system. There are many types of structures. Among them, the flash-type analog-to-digital converter is the fastest among all analog-to-digital converters. It is widely used in digital oscilloscopes, disk read and write, UWB, radar and other fields. [0003] Traditional flash analog-to-digital converters require an ultra-high-speed dynamic comparator circuit, which inevitably introduces noise and various errors, and the accuracy will be limited. And for ultra-high-speed input signals (above GHz), it will become very difficult to meet the speed requirements. At the same time, since the dynamic comparator will have a large "kickback noise", this will have a g...

AI Technical Summary

Problems solved by technology

[0003] Traditional flash analog-to-digital converters require an ultra-high-speed dynamic comparator circuit, which inevitably introduces noise and various errors, and the accuracy will be limited

And for ultra-high-speed input signals (above GHz), it will become very difficult to meet the speed requirements

At the same time, since the dynamic comparator will have a large "kickback noise", this will have a great impact on the accuracy of the dynamic comparator

Traditional dynamic comparators generally add preamplifiers to eliminate dynamic offsets, which will cause additional loss of power consumption, and sometimes the power consumption of additional preamplifiers is greater than that of the dynamic comparator itself.

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