MOS (Metal Oxide Semiconductor) transistor radio frequency macro model establishing method

Abstract

The invention relates to an MOS (Metal Oxide Semiconductor) transistor radio frequency macro model establishing method which comprises the steps of: establishing an MOS transistor, a grid electrode node, a source electrode node, a drain electrode node and a substrate node, connecting a grid electrode to the grid electrode node by a grid resistor, connecting a source electrode to the source electrode node by a source resistor, and connecting a drain electrode to the drain electrode node through a drain resistor; establishing a source electrode junction capacitor, a drain electrode junction capacitor, a first substrate resistor, a second substrate resistor, a substrate bulk resistor and a substrate well resistor; and connecting the first substrate resistor, the second substrate resistor, the substrate bulk resistor and the substrate well resistor together by resistor network nodes. A simulation macro model obtained by the method of the invention has a four-resistor substrate network of a T-shaped structure; and by using the resistor substrate network, the utilization frequency of the MOS transistor radio frequency macro model can be ensured to be above 20 GHz, thereby greatly expanding the application frequency range of CMOS (Complementary Metal Oxide Semiconductor) radio frequency integrated circuit EDA (Electronic Design Automation) design.

Description

technical field [0001] The invention relates to the simulation of an integrated circuit, in particular, the invention relates to a method for establishing a radio frequency macro model of a MOS transistor. Background technique [0002] With the increasing application of CMOS technology in the radio frequency (RF) field, the accuracy of high frequency models of MOS devices is becoming more and more important for RF product design. Since the parasitic effects of MOS devices are more complex at high frequencies and have a greater correlation with the layout, the current practice is to build high-frequency models for MOS devices in the form of macro models. [0003] The BSIM3 SPICE model is an industry standard for CMOS models, figure 1 It is a "П" type three-resistor substrate network MOS transistor macro model in the prior art. where, through two capacitors (C SB and C DB ) and three resistors (R 1 , R 2 and R 3 ) to model the circuit. [0004] However, the MOS transis...

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Problems solved by technology

[0004] However, the MOS transistor macromodel has significant deficiencies in both simulation and RF performance. Its RF model does not include non-quasistatic effects, and the model structure does not include gate resistors and substrate resistor networks.

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