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Super-junction metal oxide field effect transistor with surface buffering ring terminal structure

A field-effect transistor and terminal structure technology, applied in semiconductor devices, electrical components, circuits, etc., can solve the problems of increasing the manufacturing process, process difficulty and cost, increasing the lateral withstand voltage, reducing the surface electric field strength, reducing the The effect of surface electric field

Active Publication Date: 2011-11-23
SUZHOU POWERON IC DESIGN
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

These methods are all to achieve a better withstand voltage of the super junction metal oxide field effect transistor terminal structure. However, these methods will add additional manufacturing processes, which will increase the difficulty and cost of the process.

Method used

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  • Super-junction metal oxide field effect transistor with surface buffering ring terminal structure
  • Super-junction metal oxide field effect transistor with surface buffering ring terminal structure
  • Super-junction metal oxide field effect transistor with surface buffering ring terminal structure

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Embodiment Construction

[0023] refer to figure 1 , a super junction metal oxide field effect transistor with a surface buffer ring terminal structure, comprising: an N-type doped semiconductor substrate 1, an N-type doped epitaxial layer is arranged on the N-type doped semiconductor substrate 1 2. A P-type doped deep well region 3 is provided inside the N-type doped epitaxial layer 2, and a P-type doped region 4 and a P-type doped region 4 are arranged on the upper side of the P-type doped deep well region 3. Doped buffer zone 5, N-type doped region 6 is set in the P-type doped region 4, the P-type doped region 4, the N-type doped region 6 and part of the N-type doped region The epitaxial layer 2 together constitutes the internal cell source region 11 of the super junction metal oxide field effect transistor, the P-type doped deep well region 3, the P-type doped buffer zone 5 and part of the N-type The doped epitaxial layer 2 together constitutes the terminal withstand voltage structure region 12 of...

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Abstract

The invention discloses a super-junction metal-oxide field effect transistor with a surface buffering ring terminal structure, comprising an N-type doped semiconductor substrate, wherein an N-type doped epitaxial layer is arranged on the N-type doped semiconductor substrate, a P-type doped deep well region is arranged inside the N-type doped epitaxial layer, a P-type doped region and a P-type doped buffer region are arranged at the upper side of the P-type doped deep well region, and a high-concentration N-type doped region is arranged in the P-type doped region; polysilicon is arranged abovepartial gate oxide layer, and the polysilicon forms a polysilicon field plate structure at a terminal structure region and also forms a double-layer field plate together with a metal field plate which extends to a traditional region from a source end in the super-junction metal oxide field effect transistor with the surface buffering ring terminal structure; therefore, the surface field peak value can be reduced, the surface potential distribution is optimized, and the transverse pressure resistance level of components is effectively improved.

Description

technical field [0001] The invention belongs to the technical field of semiconductor power devices, and relates to a vertical high-voltage power device, more specifically, to a vertical super-junction metal oxide field with a surface buffer ring terminal structure having both fast switching and low on-resistance. effect transistor. Background technique [0002] The super junction metal oxide field effect transistor is a new type of device that has the advantages of the insulated gate structure of the metal oxide semiconductor transistor and has the advantages of high current density and low on-resistance. It is a kind of device that can effectively reduce the traditional power metal Oxide Semiconductor Field Effect Transistors Conduction Loss in Power Semiconductor Devices. It is a charge compensation device based on the principle of charge balance. [0003] Traditional high-voltage power metal oxide semiconductor field effect transistor devices use a low-doped epitaxial d...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/06
Inventor 易扬波李海松刘侠王钦
Owner SUZHOU POWERON IC DESIGN
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