Groove flat-grid MOSFET component and fabricating method thereof

Abstract

The invention discloses a groove flat-grid MOSFET component which comprises an n<-> epitaxial layer connected to the upside of an n<+> silicon substrate layer, wherein a flat-grid G is arranged above the n<-> epitaxial layer, the epitaxial layers at two sides of the flat-grid G are respectively provided with a p base region which is internally provided with an n<+> source region, and a source electrode is formed by short circuit between the n<+> source region and the p base region. The groove flat-grid MOSFET component is characterized in that a groove is arranged between the two p base regions along the middle of the upper end of the n<-> epitaxial layer, the inner part of the groove is filled with a polysilicon gate, gate oxide is filled between the polysilicon gate and the n<-> epitaxial layer, and the gate oxide and the polysilicon gate are respectively connected with gate oxide and polysilicon gate of the flat part above the n<-> epitaxial layer into a whole. The groove flat-grid MOSFET component improves the electric breakdown strength of the component, reduces the on resistance, keeps switch loss unchangeable, increases design and fabrication freedom, has low fabrication cost, and is completely compatible with the prior VDMOS process.

Description

technical field [0001] The invention belongs to the technical field of power semiconductor devices, and relates to a trench planar gate MOSFET device, and also relates to a manufacturing method of the trench planar gate MOSFET device. Background technique [0002] Breakdown voltage and on-resistance are two main parameters that must be considered in designing power MOSFET devices. If the breakdown voltage is increased, the on-resistance will also increase, resulting in an increase in on-state power consumption. Since there is an irreconcilable contradiction between the on-resistance and the breakdown voltage, in practical applications, it is necessary to limit the on-resistance of the power MOSFET device. [0003] The existing planar gate power MOSFET (VDMOS) structure has a simple manufacturing process, so it has been widely used in high-frequency and low-power applications. However, when the breakdown voltage of VDMOS (U BR ) rises, its on-resistance (R on ) then rises...

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Problems solved by technology

However, when the breakdown voltage of VDMOS (U BR ) rises, its on-resistance (R on ) then rises sharply at a rate of about 2.5 powers, that is, R on =U BR 2.4～2.6 , leading to a large conduction loss in the VDMOS structure

Therefore, the VDMOS structure has been limited to use in the low voltage (<200V) range

In the existing trench gate MOSFET (VUMOS) structure, although the introduction of the trench can effectively reduce the on-resistance, the breakdown voltage is greatly reduced; and, since the channel of the VUMOS structure enters the body, the threshold Voltage adjustment is more difficult

At the same time, due to the deep groove, the process cost also increases

Therefore, neither the existing VDMOS structure nor the VUMOS structure can well meet the requirements of high-frequency power switching applications.

[0004] In addition, in the actual production process, since the on-resistance and breakdown voltage of the VDMOS structure are closely related to its structural parameters, especially the gate length and cell spacing have a great influence on these two parameters, resulting in the design and production of the device less freedom

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