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Method for reducing electrical power noise in high-speed ADC application

A power supply noise, high-speed technology, applied in the ADC field, can solve problems such as interference with analog circuits, achieve the effect of eliminating noise sources and improving noise prevention performance

Inactive Publication Date: 2008-12-31
SHANGHAI MINHANG HIGH SCHOOL +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, if the output driver supply is not decoupled from the ADC output driver, the noise induced on the output driver supply VDR may interfere with other analog circuits

Method used

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Embodiment Construction

[0012] The present invention provides a kind of method for reducing power supply noise in high-speed ADC application, and it comprises following main steps:

[0013] 1. Decoupling the power supply

[0014] The power supply decoupling technique in the method of the present invention is used on a 12-bit, 40MSPS ADC. In practice, not all of these capacitors are necessary. Typically, a parallel combination of a 10mF capacitor and a 0.1mF monolithic capacitor is sufficient. Optimum values ​​may vary depending on the specific IC selected and the frequency of operation, so one must ensure that the manufacturer's recommendations are followed. The ADCS9888 is a 3-channel video capture IC for use in flat panel displays, video projectors, and other applications that require capturing high-resolution video data. It is a triple 8-bit ADC with an operating speed up to 205MSPS. It also includes a clock generation circuit for creating a high-frequency pixel clock of 25MHz~205MHz based on ...

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Abstract

The invention relates to an ADC (Analog to Digital Converter), in particular to a method for reducing power noise in the application of a high speed ADC. The method comprises main steps of: A. decoupling to the power; B. grounding item; C. independent power. By adopting the method of the invention, noise sources in the ADC power and surrounding circuits can be eliminated and the noise-proof performance in a data collecting design can be substantially improved.

Description

technical field [0001] The invention relates to an ADC (Analog to Digital Converter, analog / digital converter), in particular to a method for reducing power supply noise in high-speed ADC applications. Background technique [0002] In ADC design, there are multiple sources of noise, mainly the power supply of the ADC itself, especially the circuit design and placement around the converter. Through optimized design considerations, the impact of noise on high-speed acquisition applications can be minimized. Digital circuits often generate noise on their power supply lines. If the same power supply is also used to power analog or mixed-signal devices, this noise can couple to these components through their power pins. To the extent that their analog or mixed-signal components have good power supply rejection, this does not affect the analog or mixed-signal components. However, as stated on the datasheet, the power supply rejection ratio (PSRR) of analog and mixed-signal devi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/08H03M1/12
Inventor 项敏周佳
Owner SHANGHAI MINHANG HIGH SCHOOL
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