Sequence matching scheduling algorithm based on Clos network switching structure

A network switching and scheduling algorithm technology, applied in data switching networks, digital transmission systems, electrical components, etc., can solve problems such as large time overhead, reduced matching success rate, and reduced matching efficiency

Active Publication Date: 2010-09-29
WUHAN POST & TELECOMM RES INST CO LTD
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AI Technical Summary

Problems solved by technology

Such a situation may occur at any time during runtime, so the two-phase matching can potentially reduce the overall matching success rate
[0011] Secondly, the CRRD scheduling algorithm follows the "many-to-one" RGA matching method, that is to say, in the first stage of matching, although any VOQ may receive multiple permission messages, it can only accept one of them
Although the CRRD scheduling algorithm proposes that multiple iterations can be used in the first stage to improve the matching hit rate, multiple iterations will bring a large time overhead to the system, so in practical applications, multiple iterations are usually not used, so It is difficult to effectively solve the problem of reduced matching efficiency caused by the many-to-one matching method

Method used

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  • Sequence matching scheduling algorithm based on Clos network switching structure
  • Sequence matching scheduling algorithm based on Clos network switching structure
  • Sequence matching scheduling algorithm based on Clos network switching structure

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Embodiment Construction

[0049] The present invention will be described in further detail below in conjunction with the accompanying drawings.

[0050] A kind of sequential matching scheduling algorithm based on the Clos network switching structure of the present invention, said Clos network switching structure at least includes a switch frame and line cards and backplanes arranged on the frame, each line card The front-end chip includes k input modules IM and k output modules OM, the back-end chip on the backplane includes m intermediate modules CM, each input module IM has m output ports, and each intermediate module CM has k input ports and k output ports, the said sequential matching scheduling algorithm steps are:

[0051] Step 1: In the request phase, each virtual output group VOG containing a non-empty virtual output queue VOQ sends to each intermediate module through the m output ports of the input module IM where the cell is finally delivered to The corresponding output port of the CM issues...

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Abstract

A sequential match scheduling algorithm based on a Clos network switching structure relates to the field of network crossbar scheduling algorithm, which comprises the following steps: step 1, output ports (the number being m) of an input module send request information to a corresponding output port of each middle module; step 2, the output port of each middle module selects one virtual output group of one sent request information and sends the allowed message to the virtual output group; step 3, the output port of each middle module selects an output port of the middle module and discharges the allowed message sent from the output port; step 4, the establishing process of the channel from a virtual output queue to the output port is finished; step 5, information cells are sent out and a pointer is updated; the fourth step and the fifth step are repeated until all the information cells are sent out or all the allowed message are accepted. The scheduling algorithm of the invention adopts a straight-through type match, the whole match is finished at one time and a many-to-many 'request-allow-accept' mode is adopted, which uses the scheduling opportunity to a maximum extent.

Description

technical field [0001] The invention relates to the field of network switching scheduling algorithms, in particular to a sequential matching scheduling algorithm based on the Clos network switching structure. Background technique [0002] With the increasing scale of the computer network, it is mainly reflected in two aspects, one is the increase of the density of the switch port, and the other is the continuous increase of the line speed (Line Speed) of the input and output ports of the switch fabric. For this reason, the switching capacity required by the packet switching system of the core network is increasing. Researchers have designed a multi-stage interconnection switching system to meet the switching capacity requirements. The Clos network switching structure is one of the typical multi-stage interconnections. The switching system of the Clos network is widely used in commercial products because of its intuition, high redundancy, and "iterative" expansion. figure 1 ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/56H04L12/70
Inventor 汪洋余少华
Owner WUHAN POST & TELECOMM RES INST CO LTD
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