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Memory apparatus cascading method, memory system as well as memory apparatus

A storage device and storage system technology, applied in the field of communications, can solve the problem of no connection scheme based on PCIE bus, and achieve the effect of improving system storage space

Active Publication Date: 2008-10-08
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In the prior art, there has been a solution to connect high-speed storage devices with DDR memory as the storage medium using the InfiniBand bus, but there has not been a connection solution based on the PCIE bus.

Method used

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  • Memory apparatus cascading method, memory system as well as memory apparatus
  • Memory apparatus cascading method, memory system as well as memory apparatus
  • Memory apparatus cascading method, memory system as well as memory apparatus

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0024] Embodiment 1 describes a serial cascading technical solution.

[0025] Such as figure 1 As shown, the host Host is connected to any RAMBOX device (RAMBOX1 shown in the figure) through a PCIE bus adapter card and a PCIE bus cable. The host Host is used as a control device. After the PCIE signal generated from the host Hos via the PCIE bus cable is processed by the PCIE SWITCH bridge (for example: PEX 8548 / PEX 8508) in the RAMBOX device, multiple pairs of PCIE signals can be generated. These signals are the same, and one pair is used for This RAMBOX device uses it, and the signals of other pairs are output to the dedicated interconnection port based on the PCIE bus for use by other RAMBOX devices.

[0026] In the embodiment of the present invention, each RAMBOX device is provided with a dedicated interconnection port based on the PCIE bus, so when a RAMBOX device and the host are connected through the PCIE bus cable and the PCIE bus adapter card, the connection between ...

Embodiment 2

[0030]The solution described in the second embodiment is different from the first embodiment. The first embodiment is a serial cascading solution, while the second embodiment is a star cascading solution.

[0031] Such as figure 2 As shown, the host Host is connected to any RAMBOX device (RAMBOX1 shown in the figure) through a PCIE bus adapter card and a PCIE bus cable. The PCIE signal generated from the host through the PCIE bus cable can be extended to multiple pairs of PCIE signals after being processed by the PCIE SWITCH bridge in the RAMBOX device (for example: PEX 8548 / PEX 8508), these signals are the same, one pair For the use of this RAMBOX device, the signals of other pairs are output to the dedicated interconnection port based on the PCIE bus for use by other RAMBOX devices.

[0032] In the embodiment of the present invention, each RAMBOX device has a dedicated interconnection port based on the PCIE bus, so when a RAMBOX is connected to the host through a PCIE bus ...

Embodiment 3

[0036] The scheme described in Embodiment 3 is a combination of the schemes of Embodiment 1 and Embodiment 2 at the same time, that is, a cascade scheme in which serial cascade and star cascade are mixed.

[0037] Such as image 3 As shown in , on RAMBOX1, N (N=>1) dedicated interconnection ports of PCIE bus are transferred. Connect the PCIE bus cable drawn from the host to the dedicated interconnection port 1 in RAMBOX1 through the PCIE bus adapter card, and the dedicated interconnection port 1 is connected to the PCIESWITCH bridge 1 in RAMBOX1, and the PCIE SWITCH bridge 1 connects the input PCIE After signal processing, one pair of signals is made available to the device, and the other pairs are routed to other dedicated interconnect ports.

[0038] For RAMBOX2 to RAMBOX N, use figure 1 The described method realizes serial cascading, that is, for RAMBOX2, the dedicated interconnection port 3 of RAMBOX2 is connected with the dedicated interconnection port 2 of RAMBOX1 thro...

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Abstract

The embodiment of the invention discloses a cascade method for storage device, a storage system and a storage device. The method includes at least two storage devices, each of which comprises at least two interconnection ports, wherein the first storage device is connected to a PCIE bus cable led out of a control device through high speed peripheral equipment interconnection PCIE bus adapter; the first storage device converts a PEIE signal inputted from the PCIE bus cable into at least two pairs of same conversion signals, and outputs to other interconnection ports of the first storage device; the other interconnection ports of the first storage device are connected to other storage devices expect the first storage device by PCIE bus cables. The embodiment of the invention also provides a storage device and a storage system. The embodiment of the invention can realize cascade of multiple storage devices, thus improving the system storage space.

Description

technical field [0001] The present invention relates to the field of communication technology, in particular to a storage device cascading method, a storage system and a storage device. Background technique [0002] With the continuous development of technology, it has become a trend for storage devices to develop towards high speed and mass storage. The current high-speed storage device mainly uses DDR (Double Data Rate, double data rate transmission mode) memory as the storage medium. DDR memory is actually DDR SDRAM (Double Data Rate SDRAM, double rate synchronous dynamic random access memory). SDRAM only transmits data once in a clock cycle, and it transmits data during the rising period of the clock; while DDR memory transmits data twice in one clock cycle, and it can transmit data once in the rising period and falling period of the clock , so it is called double rate synchronous dynamic random access memory. DDR memory can achieve higher data transfer rates at the s...

Claims

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Application Information

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IPC IPC(8): G06F3/06G06F13/38
CPCG06F13/4022
Inventor 张英梗
Owner HUAWEI TECH CO LTD
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