A time division duplex digital filter

A digital filter and digital filtering technology, applied in the direction of digital transmission system, duplex signal operation, digital technology network, etc., can solve the problems of power consumption, repeated waste of digital devices, waste of system power consumption, etc., to reduce costs and functions consumption, time division multiplexing, and cost reduction

Inactive Publication Date: 2008-06-04
POTEVIO INFORMATION TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

And by figure 1 It can be seen that in the prior art, the DUC unit and the DDC unit are implemented independently and use their own digital filters, thus causing repeated waste of digital devices and increasing the implementation complexity of the base station, making the construction cost of the base station relatively high
[0006] In addition, because digital devices also consume power when they are static, when one of the digital filters in the DUC unit and DDC unit is working, the other digital filter in the non-working state is also consuming system power, which means The power consumption of the system has caused a certain waste

Method used

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  • A time division duplex digital filter
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  • A time division duplex digital filter

Examples

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Embodiment 1

[0063] The first typical application is that the uplink and downlink baseband code rates are the same, only one level of interpolation / decimation is used in digital intermediate frequency processing, and the interpolation rate is the same as the decimation rate.

[0064] Usually, the design of the digital intermediate frequency processing module is very flexible, and it is easy to ensure the same interpolation / decimation rate at the stage of system design. The same as the decimation rate is called symmetric. image 3 It is a structural schematic diagram of an existing one-stage symmetrical interpolation / decimation filter. see image 3 Since the downlink baseband code rate and the uplink baseband code rate are 1 times (1×), the interpolation rate of the downlink interpolation module 301 and the extraction rate of the uplink decimation module 303 are all L times, therefore, the downlink digital filter 302 and the uplink digital filter Filter 304 works under the same code rate,...

Embodiment 2

[0080] The second typical application is that the uplink and downlink baseband code rates are the same, the digital intermediate frequency processing system uses multi-level interpolation / decimation, and the interpolation rate and decimation rate of the same level of interpolation / decimation are the same.

[0081] In practical applications, due to the high code rate of digital intermediate frequency processing, the filter order required to directly filter the received data is relatively large. Therefore, multi-stage interpolation / decimation filtering is usually used to implement interpolation / decimation filtering. The following takes two-level cascading as an example for illustration.

[0082] Figure 5 It is a schematic structural diagram of an existing two-stage symmetrical interpolation / decimation filtering cascade. see Figure 5 , the uplink baseband code rate and the downlink baseband code rate are 1 times (1×), in the two-stage cascaded interpolation / extraction, the in...

Embodiment 3

[0101] The third typical application is that the uplink and downlink baseband code rates are different, and the interpolation rate and decimation rate are the same.

[0102] In practical applications, the uplink baseband code rate and downlink baseband code rate of some communication systems are different. For example, the downlink baseband code rate is 1 times the code rate (1×), while the uplink baseband code rate is 2 times the code rate (2×). In this case, the interpolation / decimation filter will use the following Figure 7 The shown incomplete symmetric interpolation / decimation filter structure to achieve.

[0103] Figure 7 It is a schematic diagram of the cascaded structure of the existing two-stage incompletely symmetrical interpolation / decimation filter. see Figure 7 , since the uplink baseband code rate is 2 times the code rate, and the downlink baseband code rate is 1 times the code rate, therefore, for the downlink input data, the interpolation module 701 fir...

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Abstract

The invention discloses a time-division duplexing digital filter, which comprises an uplink-downlink selection module, a multiple selector, a digital filtering module and a demultiplexer. The time-division duplexing digital filter of the invention utilizes the characteristic of the time division multiplexing of the time-division duplexing communication system, namely the characteristic that the uplink and the downlink do not simultaneously work and a certain guard interval exists for the conversion between the uplink and the downlink, and carries out the filtering processing of the uplink data and the downlink data in a time sharing manner by using the same filter resource so as to realize the time-division multiplexing with further lowering the cost and power consumption of the filtering processing in the time-division duplexing communication system.

Description

technical field [0001] The invention relates to digital wireless communication technology, in particular to a time-division duplex digital filter. Background technique [0002] In the base station of the digital wireless communication system, the digital intermediate frequency processing module is a processing module connecting the baseband processing module and the RF front end. The structure diagram of the base station of the existing digital wireless communication system is as follows: figure 1 shown. [0003] exist figure 1 In the shown base station, the digital intermediate frequency processing module consists of a digital up-conversion unit (Digital UpConverter, DUC), a digital down-conversion unit (Digital Down Converter, DDC), a digital-to-analog conversion unit (DAC) and an analog-to-digital conversion unit (ADC). see figure 1 , the working principle of the digital intermediate frequency processing module is: in the downlink, the DUC unit first interpolates the d...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L5/14H03H17/02H04L27/00H04Q7/30
Inventor 曹雪单惠平
Owner POTEVIO INFORMATION TECH
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