Manufacturing method of wafer level testing circuit board and structure thereof
A technology for testing circuit boards and manufacturing methods. It is applied in the direction of measuring electricity, measuring electrical variables, and electronic circuit testing. It can solve the problems of costly expenditure, difficult electrical testing procedures, and inability to accurately control the electrical specifications of electrical testing equipment. question
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[0021] Hereinafter, a preferred embodiment is enumerated in conjunction with some accompanying drawings, in order to further illustrate the components and effects of the present invention as follows:
[0022] see Figure 1 to Figure 7 Shown is a test circuit board 1 of the first preferred embodiment provided by the present invention, which can perform wafer-level testing on a plurality of electronic components 10 packaged in modules. The electronic components 10 exemplified in this embodiment are manufactured The integrated circuit chip forming each image sensor chip 101 is a modular package assembly after the chip size package (Chip Size Package, CSP) manufacturing process, refer to figure 2 , there are a plurality of conductive bumps 102 on it, as the connection medium for each image sensor chip 101 to be electrically connected with the external circuit; the following is a further description of the manufacturing steps of the test circuit board 1:
[0023] a. Please see if...
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