Self-test circuitry to determine minimum operating voltage

Abstract

A solution for determining minimum operating voltages due to performance / power requirements would be valid for a wide range of actual uses. The solution includes a test flow methodology for dynamically reducing power consumption under applied conditions while maintaining application performance via a BIST circuit. There is additionally provided a test flow method for dynamically reducing power consumption to the lowest possible stand-by / very low power level under applied conditions that will still be sufficient to maintain data / state information. One possible application would be for controlling the voltage supply to a group of particular circuits on an ASIC (Application Specific Integrated Circuit). These circuits are grouped together in a voltage island where they would receive a voltage supply that can be different from the voltage supply other circuits on the same chip are receiving. The same solution could be applied to a portion of a microprocessor (the cache logic control, for example).

Description

technical field [0001] The present invention relates generally to integrated circuits, and, more particularly, to systems and methods for determining and dynamically changing the minimum operating voltage of an IC. Background technique [0002] Power dissipation is becoming increasingly important to reducing both the power consumed by devices and the heat energy dissipated. A critical portion of power consumption in deep submicron technology is the power caused by leakage currents. Leakage can actually be reduced by reducing the voltage used by the circuit, thereby actually reducing the power consumption of the circuit. [0003] Previous designs have supported voltage supply scaling to maintain performance, but most designs simply reduce clock cycle frequency to reduce power. Also, different voltage / clock frequency set points are not determined on a chip-by-chip basis. [0004] US Patent No. 6,345,362 to Bertin et al. (IBM) teaches integrated circuits with intelligent pow...

AI Technical Summary

Problems solved by technology

[0003] Previous designs have supported voltage supply scaling to maintain performance, but most designs simply reduce clock cycle frequency to reduce power

Also, different voltage / clock frequency setpoints are not determined on a chip-by-chip basis

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