Method for detecting data loss of field programmable gate array
A technology of data loss and detection method, applied in the field of communication, can solve the problems of complicated functions and systematization, data loss, etc., and achieve the effect of enhancing maintenance methods, saving maintenance costs, and shortening maintenance time.
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[0016] The technical solution of the present invention will be described in more detail below with reference to the drawings and embodiments.
[0017] Figure 1 is a physical connection diagram between the CPU and the FPGA in the communication device. The CPU can access the FPGA through the device software running on it. There is a data line and an address line (Data / Addr) between the CPU and the FPGA, which are used for the CPU to access the logic unit inside the FPGA; at the same time, the PS port of the FPGA is also connected to the I / O port of the CPU, and the FPGA reads from the CPU through the PS port. Reload the FPGA data.
[0018] The method for detecting whether data loss of FPGA comprises the following steps:
[0019] Step 1, select a logic unit in the FPGA, and write a set value in one of the registers;
[0020] Step 2, the CPU reads the value of the above register, if the value is still the set value, execute step 3; otherwise, the FPGA reloads the FPGA data from ...
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