Output voltage state indicator for power source chip
A technology of output voltage and state indication, applied in the field of power chips, which can solve problems such as increased chip power consumption, increased bias current, and increased chip area, and achieves the effects of reduced chip power consumption, simple structure, and easy implementation
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[0014] As shown in FIG. 1 , the output voltage indicating circuit of the present invention includes: a dual-threshold comparator 1 , a counter 2 , an oscillator 3 , and a delay latch unit 4 . The final output signal PG (Power Good) is used to indicate whether the output voltage is working within the set normal range.
[0015] There are 3 input terminals in the dual-threshold comparator 1, and the two negative input terminals are connected to the reference voltage V generated inside the chip. REF , the threshold voltages corresponding to these two negative terminals are V TH - and V TH + . The positive input terminal is connected to the feedback signal V of the output voltage of the power chip FB , O 1 is the comparator output signal. When the output voltage has V TH - OUT TH + when V O1 = 1, otherwise, V O1 =0.
[0016] The counter 2 is N-bit and has a clearing terminal, and has three input terminals: an enabling terminal EN3, a clearing terminal CLR and a clock s...
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