Efficient switching between prioritized tasks

A task switching, task technology, applied in program saving/restoring, program control design, instrumentation, etc., can solve problems such as occupation, cycle loss, large processing cycle, etc.

Inactive Publication Date: 2009-09-02
KONINK PHILIPS ELECTRONICS NV
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  • Summary
  • Abstract
  • Description
  • Claims
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Problems solved by technology

The disadvantage of this proposal is that the task of storing / retrieving to / from such a structure is very processing cycle-intensive
This limits the applicability of task switching to large-grained tasks consisting of many cycles compared to the number of tasks, since otherwise the task switching overhead would become significant, possibly resulting in cycle Loss
[0010] However, in domains or applications with fine-grained granularity, this approach will not work, so it is desirable to obtain task switching with preferably zero cycles

Method used

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  • Efficient switching between prioritized tasks
  • Efficient switching between prioritized tasks
  • Efficient switching between prioritized tasks

Examples

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Embodiment Construction

[0033] A preferred embodiment of a processor arrangement will now be described, having a main processor 20 and a coprocessor 30 to perform task switching of two-level priority tasks based on a two-sided stack 60 with supporting functions.

[0034] figure 1 A schematic block diagram of the proposed architecture is shown, comprising a main processor 20 and co-processors 30 for specialized tasks, each capable of accessing a storage system 10 in which stored program code or routines and process data. At least a part of the storage system 10 can be shared by two processors, that is, both processors can access the same shared memory unit, wherein the storage system 10 is composed of a single or multiple storage circuits or devices. The main processor 20 may be installed with an operating system that performs various functions including system memory management, system task management and other native tasks running on the system.

[0035]Furthermore, a task scheduling function or u...

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Abstract

The invention relates to a processor device, a task scheduling method and a computer program product, wherein tasks of a program routine are selectively stored in at least two memory stack mechanisms (62, 64) within. The at least two memory stack mechanisms (62, 64) are accessed in response to synchronization instructions inserted into the program routine, thereby controlling task switching performed at the at least two processor modules (20, 30). As a result, efficient, zero-cycle task switching between prioritized tasks can be achieved.

Description

technical field [0001] The present invention relates to a processor device, method and computer program product for performing task scheduling to provide efficient switching between prioritized tasks. Background technique [0002] In the conventional state of the art of computers, the sequence of task-switching instructions results in a significant amount of time spent switching between tasks. The time spent switching between tasks is called task change processing overhead. The overhead is the time taken for register stores and restores, and it includes other delays, such as the time taken to determine task priority and task execution justification. Thus, these time periods cannot be used for efficient processing. In many modern computer or processor systems, such interrupt and task change processing overhead takes tens to hundreds of cycles. [0003] In consumer applications, for example, some peripheral data must be processed in real time, while other tasks can be proce...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/46G06F9/45
CPCG06F9/4843G06F8/451G06F9/461
Inventor M·J·M·海里格斯E·尤哈斯
Owner KONINK PHILIPS ELECTRONICS NV
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