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Floating resistance of I/O circuit on integrated circuit chip

A technology of integrated circuits and resistors, applied in the field of floating resistors of multiple I/O circuits, can solve problems such as increasing product cost, and achieve the effects of improving consistency, improving resistance value accuracy, and reducing external influences.

Inactive Publication Date: 2009-03-18
徐平
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

And because the number of I / O circuits on the same integrated circuit chip is relatively large, if the same integrated circuit chip of each I / O circuit impedance variety is designed and manufactured separately, the cost of the product will be increased.

Method used

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  • Floating resistance of I/O circuit on integrated circuit chip
  • Floating resistance of I/O circuit on integrated circuit chip
  • Floating resistance of I/O circuit on integrated circuit chip

Examples

Experimental program
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Effect test

Embodiment 1

[0017] The electrical structure of a dual low-voltage differential signal I / O on a 17-channel dual low-voltage differential signal (LVDS) I / O integrated circuit chip, such as figure 1 Shown. A P-type FET 21 and an N-type FET 22 of the first group of low-voltage differential signal I / O are connected in series between the constant current source 11 connected to the power supply voltage Vcc and the constant current source 12 connected to the ground level , The grid Sp1 of the P-type FET 21 and the grid Sn1 of the N-type FET 22 are the two input terminals of the first group of low-voltage differential signals. A point A of the signal output terminal of the first group of low-voltage differential signal I / O, that is, the connection point of the P-type field effect transistor 21 and the N-type field effect transistor 22 is connected to a floating resistor 23. The other end of the floating resistor 23 is connected to the CM point and a constant voltage V is provided by an on-chip power ...

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Abstract

The invention is the I / O circuit floating resistance of the IC chip, which relates to multiple I / O circuit floating resistances integrated in IC chip using CMOS technology. Every floating resistance of the invention has a polysilicon resistance; the both end of polysilicon resistance parallels a P-type FET and an N-type FET, in which the constant-voltage end of the polysilicon resistor links the drain of the said two FETs, and the fluctuant-voltage end of the polysilicon resistance links the source of the two FETs; the gate of P-type FET connecting the ground, the gate of N-type FET connecting the voltage output of the constant-voltage controlled power supply. It solves the low precision of the polysilicon floating resistance, and the problem that need to separately design and manufacture, and the high cost of products, when there are several different I / O circuit impedances in the same IC chip. In the invention, the parasitic capacitance of floating resistance is small, which suitable for work in high-speed I / O.

Description

Technical field [0001] The invention relates to a resistor on an integrated circuit chip, in particular to a floating resistor of a plurality of I / O circuits integrated on the integrated circuit chip by using a CMOS process to achieve more accurate impedance matching. technical background [0002] The floating resistance of the I / O circuit on the integrated circuit chip manufactured by the CMOS process generally adopts polysilicon (poly) resistance. The resistance value of this kind of resistance is designed according to the length, and the accuracy can only reach ±20%. Since the resistance value of the floating resistance of the I / O circuit on the integrated circuit chip directly affects the external impedance of the I / O circuit, the resistance accuracy of the floating resistance of the impedance matching in the I / O circuit on various high-speed integrated circuit chips is required to reach ±5%-10%, so the floating resistance of polysilicon is not suitable for use in I / O circuit...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/02H01L23/64
CPCH01L2924/0002
Inventor 徐平
Owner 徐平
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