System for specifying addresses by creating a multi-bit ranked ordered anchor pattern and creating next address by shifting in the direction of the superior position

Abstract

An automatic addressing technique for flexibility specifying the individual physical addresses of a plurality of devices coupled to an information bus. An anchor pattern is applied to an address bus of a plurality of address taps sufficient to uniquely specify the numbered J of devices to be attached thereto. Each device is connected to a tap on the address bus, each tap having the same number of bits. A plurality of address transform elements are serially connected to the bus, each transform element being located between adjacent tap positions. Each transform element converts the address pattern coupled to its input to another pattern capable of uniquely specifying the next address in the desired sequence. A wide variety of address sequences are available for selection, with each particular address sequence automatically determined by the related specific anchor pattern. The transform elements are passive elements, and no jumpers or settable switches are required to specify the physical addresses when configuring or reconfiguring the system.

Description

BACKGROUND OF THE INVENTIONThis invention relates to addressing techniques used for bus oriented computer systems. More particularly, this invention relates to an automatic addressing technique for flexibly specifying the individual addresses of a plurality of devices coupled to an information bus.Bus oriented computer systems are known in which individual devices connected to an information bus are assigned unique addresses specifying the location of each device in a computer system. Typically, individual devices are provided with a mechanical, electrical or electromechanical device capable of being set to provide a unique address for the device. For example, in some known arrangements, each device is provided with jumper terminals which can be connected to an appropriate voltage (e.g., ground) in such a manner that the voltage level on the combined collection of jumper terminals uniquely specifies the physical address of that device, usually using a binary numbering system. In sti...

AI Technical Summary

Benefits of technology

The invention comprises an automatic addressing technique for specifying the individual unique addresses of an array of devices which is relatively simple and inexpensive to implement, highly reliable in operation, capable of establishing any address sequence required in a given application, and highly compatible with highly configurable computer system.

The invention provides a highly reliable device addressing capability which is extremely simple to implement, requiring only passive electrically conductive paths arranged in a repeated predetermined pattern in order to effect the sequential address transformations. Since the desired sequence can be unlimited, the invention is extremely useful and effective is bus oriented computer systems which are intended to be highly configurable. Moreover, the specification of a desired address sequence is completely determined once the anchor pattern has been established for a given desired sequence.

Problems solved by technology

In both types of arrangement, the specification of a unique device address requires that a user, usually a technician, manipulate the address specifying device, which creates the possibility for human error in initially configuring the system.

This type of arrangement required a relatively sophisticated programming approach and is prone to both software and signaling errors.

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