Substrate Polishing Method and Apparatus

Abstract

A polishing apparatus is provided for optimizing a polishing profile in consideration of even such parameters as the temperature on the surface of an object to be polished, and the thickness of a polishing pad, in addition to a polished amount. The polishing apparatus for polishing the object to be polished under control of a control unit CU has at least two pressing sections, and comprises a top ring which can apply an arbitrary pressure to the object to be polished from each of the pressing sections, a measuring device IM for measuring a polished amount of the object to be polished, and a monitoring device SM for monitoring the object to be polished for a polishing condition. The control unit CU forces the polishing apparatus to polish the object to be polished in accordance with a simulation program for setting processing pressures required to optimize a polishing profile of the object to be polished to the top ring based on the output of the measuring device IM and the output of the monitoring device SM.

Description

TECHNICAL FIELD[0001]The present invention relates to a substrate polishing apparatus for polishing materials to be polished, represented by a semiconductor substrate, which can suppress a degradation in yield rate due to non-uniformity of residual films on the surface of substrates, mainly caused by aging changes of consumable materials, extend the life time of such consumable materials to reduce an operation cost, and a polishing apparatus which embodies the method.BACKGROUND ART[0002]In recent years, as semiconductor devices are increasingly more miniaturized and complicated in element structure, the semiconductor devices tend to have increased asperities and larger steps on the surface. As a result, thin films are formed in smaller thicknesses on such steps, and open circuits can be developed due to disconnections of wires, and short circuits attributable to defective insulation between wiring layers, leading to a lower yield rate. In a planarization technology for solving such ...

AI Technical Summary

Benefits of technology

[0007]The present invention has been proposed in view of the foregoing problems, and it is an object of the invention to automatically optimize a processing pressure using a simulator based on the Preston's empirical formula within a polishing apparatus, sufficiently monitor even those parameters which cannot be covered by the Preston 's empirical formula to improve a correction accuracy, and accomplish a uniform polishing profile associated with increasing miniaturization of integrated circuits.

[0008]It is another object of the present invention to correctly manage the state of consumable materials which have been conventionally replaced after a certain number of substrates had been processed to extend the life time of the consumable materials and reduce the operational cost.

[0009]To achieve the above objects, the polishing apparatus according to the present invention comprises a top ring for holding an object to be polished such as a wafer while applying a pressure to the object to be polished against a polishing member in order to polish the object to be polished. The top ring can arbitrarily set a pressure to the object to be polished in each of concentrically partitioned areas, and can therefore control a pressing force on the object to be polished. Therefore, if the object to be polished is not polished into a flat shape, a pressing force for a required polished amount can be additionally applied, for example, to a portion which is not sufficiently polished, thus making it possible to provide high polishing performance with high accuracy flatness.

Problems solved by technology

In recent years, as semiconductor devices are increasingly more miniaturized and complicated in element structure, the semiconductor devices tend to have increased asperities and larger steps on the surface.

As a result, thin films are formed in smaller thicknesses on such steps, and open circuits can be developed due to disconnections of wires, and short circuits attributable to defective insulation between wiring layers, leading to a lower yield rate.

Specifically, allowed aging changes in the polishing profile is increasingly narrowed in more miniaturized devices and devices having a larger number of layers, resulting in a higher frequency of replacement of consumed polishing members.

However, the consumable members of the CMP are so expensive that a higher frequency of replacement due to consumption will largely affect the cost of devices.

However, in the CMP, the speed of polishing based on chemical actions is largely affected by a processing temperature, thus making it difficult in some cases to predict the polished amount with high accuracy only from the Preston's empirical formula.

Further, the Preston's empirical formula fails to cover such factors as insufficient dressing associated with a reduced cutting rate of a pad conditioner, and a reduced amount of removed polishing debris.

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