Semiconductor memory device and method of manufacturing the same

Abstract

A semiconductor memory device having a memory cell region and a peripheral circuit region, and a method of manufacturing such a semiconductor memory device, are proposed, in which trench grooves are formed to be shallow in the memory cell region in order to improve the yield, and trench grooves are formed to be deep in the high voltage transistor region of the peripheral circuit region, in particular in a high voltage transistor region thereof, in order to improve the element isolation withstand voltage. A plurality of memory cell transistors having an ONO layer 15 serving as a charge accumulating insulating layer are provided in the memory cell region, where element isolation grooves 6 for these memory cell transistors are narrow and shallow. Two types of transistors, one for high voltage and the other for low voltage, having gate insulating layers 16 or 17, which are different from the ONO layer 15 in the memory cell region, are provided in the peripheral circuit region, where at least element isolation grooves 23 for high voltage transistors are wide and deep. In this way, it is possible to improve the degree of integration and yield in the memory cell region, and secure withstand voltage in the peripheral circuit region.

Description

CROSS-REFERENCE TO RELATED APPLICATION [0001] This application is based upon and claims the benefit of priority from prior Japanese Patent Application No. 2003-344689, filed on Oct. 2, 2003, the entire contents of which are incorporated herein by reference. BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] The present invention relates to a semiconductor memory device and a method of manufacturing the same. In particular, the present invention relates to a semiconductor memory device, in which non-volatile memory cells are highly densely arranged, and highly resistant to a relatively higher voltage, and a method of manufacturing such a semiconductor memory device. [0004] 2. Related Art [0005] So-called MONOS (Metal-silicon Oxide-silicon Nitride-silicon Oxide-Semiconductor) memory cell devices, in which electric charge is trapped into silicon nitride layers, are known as one type of non-volatile semiconductor memory devices capable of being electrically written and ...

AI Technical Summary

Problems solved by technology

As a result, it becomes difficult to achieve a good embedding characteristic.

Since the conventional semiconductor memory device has the aforementioned structure, and the process of the method of manufacturing the conventional semiconductor memory device is carried out in the manner mentioned above, the following problems have been raised.

Thus, it is difficult to improve the withstand voltage.

Thus, it is difficult to improve the manufacturing yield.

Thus, the aforementioned conventional semiconductor memory device and the method of manufacturing such a semiconductor memory device have problems in that the trench grooves in the region of memory cell device 1, which should be as shallow as possible in order to improve the yield, are formed deep, and that the trench grooves in the high voltage transistor region of the peripheral circuit portion 2, which should be as deep as possible in order to improve the element isolation withstand voltage, are formed shallow.

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