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Method for improving PCI communication credibility and efficiency

A reliable and efficient technology, applied in the field of communication, can solve the problems of DMA transmission failure, data re-entry, transmission error, etc., to prevent data re-entry, improve utilization, and solve the effects of communication data loss

Inactive Publication Date: 2007-02-07
WUHAN HONGXU INFORMATION TECH
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Problems solved by technology

[0003] In the general design, a data sending and receiving buffer is set on each board. When the DMA operation is not very frequent and the amount of data processed is not very large, the time interval between two DMA operations can ensure the completion of a DMA operation process. , so there will not be a situation where the next DMA operation fails due to a long wait for an available memory area (that is, the transceiver buffer); when the amount of data between boards is particularly large, this unfavorable situation may occur: DMA is processing The data in the buffer, and at this time another data arrives, needs to be written into the buffer, so that the DMA data transmission is started again before the data in the sending and receiving buffer is processed, and data re-entry (overwriting) will occur, resulting in transmission Error; or because the data processing in the transceiver buffer is not completed and the DMA is delayed due to the lack of availability of the transceiver buffer, the DMA transmission will fail and the data to be transmitted will be lost

Method used

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  • Method for improving PCI communication credibility and efficiency
  • Method for improving PCI communication credibility and efficiency
  • Method for improving PCI communication credibility and efficiency

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Embodiment Construction

[0013] specific implementation

[0014] Implementation of the present invention: utilize this algorithm, program with computer language, combine board hardware, realize the reliable communication of large capacity of PCI.

[0015] The technical scheme of the present invention is further illustrated below by way of examples.

[0016] see figure 1 , figure 1 It is a DMA operation process in which two boards are used to allocate a buffer respectively in the prior art. The contents of the process are as follows:

[0017] Step 10, detecting the status of the sending buffer of board No. 1, and confirming whether the DMA operation can be performed currently;

[0018] Step 11, the sending buffer is in a busy state, and the DMA operation enters a delay waiting, and constantly detects the sending buffer state;

[0019] Step 12, when the set delay time is up, the sending buffer is unavailable, the DMA operation fails, and an alarm is issued;

[0020] Step 13, the sending buffer is ...

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Abstract

The related method to improve reliability and efficiency for PCI communication comprises: arranging processor and memory on every board, assigning two or three independent areas with same structure on memory as DMA data buffer; alternative operating the two or three areas every with a state flag bit. This invention can prevent data error operation, and improves reliability and efficiency for communication.

Description

technical field [0001] The invention belongs to the technical field of communication, and relates to a method for ensuring high reliability and high efficiency of communication in a communication system between boards and cards connected by PCI bus specification. Background technique [0002] In PCI communication, at present, in the field of telecommunication systems and other fields, there is a multi-board communication system connected by the PCI bus specification. The boards can be regarded as compact computers. Each board has a processor CPU, memory, etc. High-speed, large-scale data transmission generally adopts Direct Memory Access DMA (Direct Memeory Access) technology. In DMA mode, data can reach the maximum data transmission rate of the PCI bus specification. The transmission process is completed by the DMA controller, which hardly requires the system core. intervene. The DMA communication mechanism is as follows: divide the corresponding memory area on the two boa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/28
Inventor 戴长江
Owner WUHAN HONGXU INFORMATION TECH
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