High structural LDPC coding and decoding method and coder and decoder
A technology of LDPC codes and coding methods, applied in error detection coding using multi-bit parity bits, error correction/detection using arithmetic codes, error correction/detection using block codes, etc., can solve the performance degradation of hardware execution , It is difficult to meet the high data transmission rate requirements and other problems
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Embodiment 2
[0033] Embodiment 2 The HS-LDPC encoding method and decoding method of the present invention are implemented with a long code with a encoding rate of 5 / 8. It differs from Embodiment 1 only in that the parity check matrix H generated by the check matrix generation unit in the encoder is different and the structure of the decoder related to the H structure is changed. Other encoding and decoding processes and implementation Example 1 is basically the same and will not be repeated here.
[0034] Described parity check matrix generating unit can know that its column weight j is 3 according to HS-LDPC code (3,8), and can generate sub-matrix as H 0 , H 1 , H 2 The parity check matrix H is 8 according to its row weight k, and because the sum code length is 9472, the code length 9472 can be divided by the row weight 8 to generate 1184 blocks of the parity check matrix H 0 , H 1 , H 2 Syndrome matrix A 0 , A 1 ,...A k , B 0 , B 1 ,...B k , C 0 , C 1 ,...C k , because one ...
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