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High structural LDPC coding and decoding method and coder and decoder

A technology of LDPC codes and coding methods, applied in error detection coding using multi-bit parity bits, error correction/detection using arithmetic codes, error correction/detection using block codes, etc., can solve the performance degradation of hardware execution , It is difficult to meet the high data transmission rate requirements and other problems

Inactive Publication Date: 2005-06-08
TIMI TECH
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  • Claims
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Problems solved by technology

However, this design uses a very complex randomized interconnection network (shuffle network), which will still cause hardware execution (FPGA / ASIC) performance degradation due to high routing costs
In addition, these encoding schemes are ultimately difficult to meet the high data transfer rate requirements required by many high-speed applications

Method used

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  • High structural LDPC coding and decoding method and coder and decoder
  • High structural LDPC coding and decoding method and coder and decoder
  • High structural LDPC coding and decoding method and coder and decoder

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Embodiment 2

[0033] Embodiment 2 The HS-LDPC encoding method and decoding method of the present invention are implemented with a long code with a encoding rate of 5 / 8. It differs from Embodiment 1 only in that the parity check matrix H generated by the check matrix generation unit in the encoder is different and the structure of the decoder related to the H structure is changed. Other encoding and decoding processes and implementation Example 1 is basically the same and will not be repeated here.

[0034] Described parity check matrix generating unit can know that its column weight j is 3 according to HS-LDPC code (3,8), and can generate sub-matrix as H 0 , H 1 , H 2 The parity check matrix H is 8 according to its row weight k, and because the sum code length is 9472, the code length 9472 can be divided by the row weight 8 to generate 1184 blocks of the parity check matrix H 0 , H 1 , H 2 Syndrome matrix A 0 , A 1 ,...A k , B 0 , B 1 ,...B k , C 0 , C 1 ,...C k , because one ...

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Abstract

This invention discloses a highly structured LDPC coding and decoding methods. The code is through the checking matrix production unit of the encoder based on the pre-set code rate, column weight and row weight of HS-LDPC code to produce an odd-even checking matrix, and input the result into a compounding code unit of a coder, the compounding code unit calculates the input data information and the odd-even checking matrix, output the data information united by the odd-even checking information bit and input data information. The decoding method is according the need of the matrix odd-even checking code, pre-set the changeable node units, checks the number of the node units and the connecting units and the connecting structure, the changeable node units and the checking node units together complete the iterative decoding process of HS-LDPC code. This method can greatly reduce the complication of the hardware implementation of the entire decoder, compromises easily of the complicated degree and the speed of the hardware realization process.

Description

technical field [0001] The invention belongs to the technical field of communication channel coding and decoding, and in particular relates to a coding method and a decoding method for quickly and effectively correcting channel errors by adopting a highly structured parity check code and an encoder and a decoder. Background technique [0002] Various errors often occur during data storage and transmission. The reasons for this error include random noise, loss of synchronization in the demodulation process, multipath attenuation in wireless transmission, track loss in magnetic storage, and so on. Due to the existence of these errors, the information transmission rate and transmission quality under a specific broadband are greatly limited. Especially in the wireless multimedia transmission system, because a large amount of data needs to maintain high reliability in the channel transmission with limited bandwidth and subject to various burst interference, this problem becomes ...

Claims

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Application Information

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IPC IPC(8): H03M13/07H03M13/11
Inventor 刘辉王联邢观斌沈漫源杨庆华申红兵李群
Owner TIMI TECH
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