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Flash memory unit, flash memory unit array and mfg. method thereof

A memory cell array and memory cell technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, electric solid-state devices, etc., can solve the problems of slow operation speed of memory cells, small reading current of memory cells, and inability to improve device performance, etc. , to achieve the effect of improving operation speed and performance, improving gate coupling rate, and high electron injection efficiency

Inactive Publication Date: 2005-03-09
POWERCHIP SEMICON CORP
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  • Claims
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AI Technical Summary

Problems solved by technology

However, the program of writing and reading the memory cells in the NAND array is relatively complicated, and because many memory cells are connected in series in the array, the read current of the memory cells is relatively small, and the A problem that causes the operation speed of the memory cell to slow down, and the performance of the device cannot be improved

Method used

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  • Flash memory unit, flash memory unit array and mfg. method thereof
  • Flash memory unit, flash memory unit array and mfg. method thereof
  • Flash memory unit, flash memory unit array and mfg. method thereof

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Embodiment Construction

[0048] Figure 1A To show the top view of the NAND type flash memory cell array of the present invention. Figure 1B For display Figure 1A A cross-sectional view of the structure along the line A-A' in the middle.

[0049] Please also refer to Figure 1A versus Figure 1B , The flash memory cell array structure of the present invention is at least composed of a substrate 100, an element isolation structure 102, an active area 104, a plurality of stacked gate structures 106a-106d (each stacked gate structure 106a-106d starts from the substrate 100). The sequence is a select gate dielectric layer 108, a select gate 110, a cap layer 112), a spacer 114, a tunneling dielectric layer 116, a plurality of floating gates 118a-118d, and a plurality of control gates 120a- 120d, the inter-gate dielectric layer 122, the drain region 124, and the source region 126 are formed.

[0050] The substrate 100 is, for example, a P-type silicon substrate, and the substrate 100 is provided with a deep ...

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Abstract

The present invention discloses a flash memory storage unit, flash memory storage unit array and its making method. Said flash memory storage unit array consists of substrate, series-connected several storage unit structures and source region / drain region. Every storage unit structure is formed from stack gate structure consisting of selection gate dielectric layer, selection gate and top cover layer; gap wall placed on the side wall of selection gate; control gate which is placed on one side of the stack gate structure and is connected with stack gate structure; floating gate placed between control gate and substrate; intergate dielectric layer placed between the control gate and floating gate; tunneling dielectric layer placed between floating gate and substrate and control gate and source region / drain region respectively placed in the most external side of storage unit array and substrate of one side of stack gate structure.

Description

Technical field [0001] The present invention relates to a semiconductor element, and particularly relates to a flash memory cell and a manufacturing method thereof. Background technique [0002] Flash memory devices have the advantages of being able to store, read, and erase data multiple times, and the stored data will not disappear after power off, so it has become a widely used personal computer and electronic device. A non-volatile memory component. [0003] A typical flash memory device uses doped polysilicon to fabricate floating gates and control gates. Moreover, the floating gate and the control gate are separated by a dielectric layer, and the floating gate and the substrate are separated by a tunnel oxide layer. When the flash memory is written / erased (Write / Erase) data, the control gate and source / drain regions are biased to inject electrons into the floating gate or make electrons from the floating gate. Extremely pull out. When reading data in the flash memory, a wor...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8247H10B69/00H10B99/00
Inventor 许正源洪至伟吴齐山黄明山
Owner POWERCHIP SEMICON CORP
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