Method and device for testing printed circuit boards with a parallel tester

Abstract

The invention relates to a method and device for testing printed circuit boards with a parallel tester. The printed circuit boards comprise strip conductors whose end points are embodied as printed circuit board testing points which can be contacted during testing. The method comprises the following steps; testing a printed circuit board with a parallel tester, whereby the printed circuit board testing points of the printed circuit board are brought into contact with the contact elements of the parallel tester; determining the printed circuit board testing points which are either judged to be unable to be put correctly into contact with the parallel tester or deemed to be basically unable to be put into contact with the parallel tester; and re-measuring the printed circuit board test points judged to be unable to be put correctly into contact or the non contactable printed circuit board test points and also the strip conductors connected to said points by means of a device which is independent from the contact elements in the parallel tester.

Description

field of invention [0001] The present invention relates to a method and apparatus for testing printed circuit boards, and more particularly to a method and apparatus for testing unpopulated circuit boards. Background technique [0002] Printed circuit boards have multiple meshes whose density increases with the continued miniaturization of electronic components. This correspondingly increases the density of circuit board contact points described below as circuit board test points. [0003] Known devices for electrical testing of printed circuit boards can be basically divided into two categories. The first category is represented by parallel testers, which have an adapter for simultaneously contacting all circuit board test points to be scanned. The second category includes sequential testers. This specifically includes finger testers, devices that utilize two or more contact heads to sequentially scan individual circuit board test points. [0004] Parallel testers and a...

AI Technical Summary

Problems solved by technology

However, compared to types of equipment that operate with interposers, connector testers are substantially slower because the board test points are scanned sequentially

[0009] Parallel testers, on the other hand, have the disadvantage of limited resolution because the test probes of the interposer cannot be as close to each other as desired

For printed circuit boards with a high contact point density, this can lead to erroneous measurements because individual board test points do not make proper contact with an adapter's test probes

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