Reliable frame synchronizing method in data communication

A data communication and frame synchronization technology, applied in the field of electrical communication, can solve the problems of difficult acquisition and frame synchronization methods, and achieve the effects of large fault tolerance, simple circuit, and easy modification and upgrade.

Inactive Publication Date: 2006-04-05
NO 30 INST OF CHINA ELECTRONIC TECH GRP CORP
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  • Description
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Problems solved by technology

And such a frame synchronization method is difficult to obtain from the existing technology

Method used

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  • Reliable frame synchronizing method in data communication
  • Reliable frame synchronizing method in data communication
  • Reliable frame synchronizing method in data communication

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Embodiment Construction

[0025] The serial-to-parallel conversion is performed at the receiving end, and the data after the serial-to-parallel conversion enters the frame synchronization judgment module. When the receiver receives a byte, it sends the hardware to the frame synchronization judgment module for processing, and searches for frame synchronization. The frame synchronization algorithm of the receiver is described as follows:

[0026] (1). Define a shift register K with a length of m bytes. K can be regarded as an m×8 matrix, each row is composed of a byte, and each column is composed of the same bits of m bytes. Initialize the shift register with all 0s. In addition, a data receiving register R is set, which has a total of 8 bits and an initial value of 0. which is,

[0027] K=[0], R=0 see Fig. 3, Fig. 4, Fig. 5.

[0028] (2). Every time a byte is received, put it into K bit by bit from the first row and first column of the matrix.

[0029] (3). Calculate the sum Z of each column...

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Abstract

Using corrective grouping bit sequence output from demodulator, the invented technique is completed through decision module in frame synchronization. Synchronous code is composed of 7 bits barker code. Data at sending end are sent according to frame. Frame synchronization code group and data frame start-up word are inserted in front of each data frame, which is modulated and then sent to channel. Serial-parallel conversion is carried out at receiving end. Hardware sends each word received at the receiving end to decision module in frame synchronization for further processing. The decision module in frame synchronization is controlled by specific mathematic mode. The invention combines hardware with software, providing features of simple circuit, reliable synchronization, small program size and less resources needed. Good fault tolerant capability is kept under low S / N ratio. It is easy to modify and upgrade software. Thus, the invention raises quality and security greatly.

Description

technical field [0001] The present invention relates to the technology of electric communication, especially the technology of radio data communication, especially the reliable frame synchronization method of mobile data communication. Background technique [0002] Frame synchronization is applied in various types of communication networks. There are many frame synchronization technologies, but most of them are formulated for the better transmission conditions. In the case of relatively good transmission conditions, the processing of frame synchronization is relatively simple, and the receiver can realize frame synchronization very quickly. However, it is difficult to guarantee the reliability of frame synchronization when the channel condition is poor. Although the establishment of the frame synchronization of the main components takes into account a certain channel bit error rate, if the system's fault tolerance is to be increased, the hardware implementation will become ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04Q7/20H04B7/26H04W28/02
Inventor 姜永广曾浩洋
Owner NO 30 INST OF CHINA ELECTRONIC TECH GRP CORP
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