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Signal synchronization device and digital signal output device

A digital signal output and signal synchronization technology, applied in the direction of synchronizing information channels, transforming continuous pulse chains into pulse chain devices with required modes, automatic power control, etc., can solve the problem that two-stage flip-flop synchronization circuits are not suitable for real-time Control and other issues to meet the real-time control requirements, avoid abnormalities, and avoid metastable phenomena

Pending Publication Date: 2022-07-19
NUVOTON
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, since the digital signal will have a signal delay of two cycles when passing through the two-stage flip-flop, the two-stage flip-flop synchronous circuit is not suitable for applications requiring real-time control

Method used

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  • Signal synchronization device and digital signal output device
  • Signal synchronization device and digital signal output device
  • Signal synchronization device and digital signal output device

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Embodiment Construction

[0023] The term "coupled" as used in this specification (including the claims) may refer to any direct or indirect connection. For example, "the first device is coupled to the second device" may be interpreted as "the first device is directly connected to the second device" or "the first device is indirectly connected to the second device through other devices or connections". Furthermore, elements / means / steps having the same reference numerals represent the same or similar parts wherever appropriate in the figures and embodiments. Elements / devices / steps with the same reference numerals or names in different embodiments may be cross-referenced.

[0024] Several embodiments are provided below to describe the present application in detail, but the present application is not limited to the provided embodiments, and the provided embodiments may be appropriately combined. In the following embodiments, the same or similar reference numerals represent the same or similar components ...

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Abstract

A digital circuit counts a first frequency signal to generate a count value and generates an output voltage according to the count value, an analog circuit generates a feedback signal according to the output voltage, and a synchronization circuit samples the feedback signal according to a second frequency signal to generate a synchronization signal. The control circuit generates a voltage control signal according to the second frequency signal and the synchronization signal to control the digital circuit to stop counting the first frequency signal, wherein the frequency of the first frequency signal is lower than that of the second frequency signal.

Description

technical field [0001] The invention relates to an electronic device, in particular to a signal synchronization device and a digital signal output device. Background technique [0002] The development of integrated circuits has become more complicated. A chip not only integrates analog and digital circuit designs, but also has several operating areas with different frequencies inside the digital circuit. The metastable phenomenon occurs in the digital signal, and the digital signal relies on the synchronization circuit to avoid the metastable phenomenon in the cross-frequency domain. [0003] In the prior art, the commonly used synchronous circuit is designed to avoid the occurrence of metastable phenomenon by connecting two-stage flip-flops (D flip-flops) in series. Wherein, when a metastable phenomenon occurs in the first-stage flip-flop, the second-stage flip-flop can correct the signal with the metastable phenomenon, so as to avoid the digital circuit operation error ca...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03L7/16H03K5/156
CPCH03L7/16H03K5/156H03L7/0991H03L7/148H04L7/0008
Inventor 刘则言
Owner NUVOTON
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