System structure optimization method and device for processor loop body

Abstract

The present disclosure provides a method and device for optimizing the architecture of a processor loop body. The method includes: judging whether the current instruction is a short loop body instruction, and if so, caching the current instruction in the short loop body cache; If there is a valid record matching in the table, it is determined that the current instruction is a conditional branch instruction of the control loop body, and the subsequent instruction is prefetched from the corresponding jump_pc in the table. The architecture optimization method and device for the processor loop body provided by the present disclosure can take out short loop body branch instructions with lower power consumption and more efficiently and quickly, reducing the probability of cavitation in the pipeline, thereby avoiding as much as possible The pipeline has the problem of low core performance caused by slow instruction fetching; more accurate loop body prediction is realized, and conditional branch instructions for loop body control can be quickly detected, reducing the frequency of pipeline flushing and improving processor performance.

Description

technical field [0001] The present disclosure relates to the field of computer technologies, and in particular, to an architecture optimization method and apparatus for a processor loop body. Background technique [0002] In a program, there are usually a large number of loop statements. In C code, it is generally embodied as a statement in the form of for, while, do...while. The content of the loop body needs to be repeatedly fetched and executed repeatedly. Just because the register contents are different, the result of execution is not the same. [0003] First of all, in terms of branch prediction, for the branch prediction behavior of the loop body, the academic community has proposed the strategy of "jump backward, not jump forward". The backward jump here means that the jump target address is smaller than the current address. Jump forward means that the jump target address is greater than the current address. But there is no mention of how the loop body is detected...

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Problems solved by technology

[0004] On the other hand, front-end instruction fetching generally focuses on how to quickly access icache fetching of instructions and instruction prefetching, which is useful for reducing the number of accesses to the cache for short loops (the number of instructions in the loop is small) to save power consumption and speed up the execution of instructions in short loops. Taken out, this type of research has received little attention

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