Signal injection system for hardware-in-the-loop testing

Abstract

The invention discloses a signal injection system for hardware-in-the-loop testing. The design concept of the invention is to construct two parallel communication networks through dual channels of a bus board, and between the two parallel communication networks A virtual gateway with a data path switching mechanism is established between the two devices to realize the injection of custom signals; and the connection between the real controller node and the aforementioned first channel or bus is also realized through the hardware switch, thereby realizing the multi-node connection. signal injection operation. The invention realizes the full coverage of multi-node hardware-in-the-loop test signal injection, and at the same time enables the tested node to receive messages from other nodes in the network through the parallel network, so that false alarm codes and the like are not generated.

Description

technical field [0001] The invention relates to the field of hardware-in-the-loop testing, in particular to a signal injection system for hardware-in-the-loop testing. Background technique [0002] Hardware-in-the-loop testing has become an important part of the vehicle controller development model. At present, many OEMs have shifted from hardware-in-the-loop testing of a single controller to integrated HIL testing of multiple controllers. Integrated HIL testing can be run simultaneously on multiple nodes. In the case of testing, the interaction between the subsystems is tested and verified. [0003] When the real controller node is online, if it is necessary to inject faults such as valid bits, error values, and logic errors of signals, the conventional method is to inject faults of related devices to indirectly implement controller error signal injection. Due to the unclear logic of some signal faults or the related components are not open to self-defined fault informatio...

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Problems solved by technology

[0003] When the real controller node is online, if it is necessary to implement fault injection such as effective bits, error values, logic errors, etc. of the signal, the conventional method is to indirectly implement controller error signal injection by injecting related device faults. Due to the fact that some signal failure logics are not clear or the components involved are not open to customize relevant fault information, etc., this existing method cannot fully cover the injection test of all valid bits, error values ​​and other signals sent by the controller. , that is, the existing multi-node integrated hardware-in-the-loop test method, it is difficult to change the CAN message sent by the real controller node to achieve fault injection

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