Floating-gate split-gate flash memory device structure and manufacturing method thereof

Abstract

The present application relates to the technical field of semiconductor integrated circuit manufacturing, and in particular, to a floating gate type split-gate flash memory device structure and a manufacturing method thereof. The method includes: forming a floating gate oxide layer, a floating gate polysilicon layer, a polysilicon spacer layer, and a control gate polysilicon layer in sequence on a flash memory region of a substrate of a first conductivity type; defining a flash memory cell region; forming a first conductive type anti-penetration injection region; depositing a first dielectric layer; etching the first dielectric layer to form a first spacer; using the mask layer and the first spacer as a mask, not covering the first spacer The control gate polysilicon layer and the polysilicon spacer layer are removed by etching; the first conductivity type halo implantation is performed to form the first conductivity type halo; the second dielectric layer is deposited, and the second sidewall spacer is formed by etching; The floating gate polysilicon layer and the floating gate oxide layer of the sidewall spacer and the second sidewall spacer are removed by etching; the second sidewall spacer and the first sidewall spacer are used as masks to form a second conductive type implantation region.

Description

technical field [0001] The present application relates to the technical field of semiconductor integrated circuit manufacturing, and in particular, to a floating gate type split-gate flash memory device structure and a manufacturing method thereof. Background technique [0002] Floating-gate split-gate flash memory is widely used in various embedded electronic products such as financial IC cards, automotive electronics and other fields because it is beneficial to save chip area and improve storage integration density. [0003] figure 1 A schematic cross-sectional structure diagram of a floating-gate split-gate flash memory device in the related art is shown, refer to figure 1 , the floating-gate split-gate flash memory device includes a first P-type region 17 formed in the P-type substrate 11 , and the first P-type region 17 is used to prevent device punch-through. A drain region 25 and a source region 24 are respectively formed in the P-type substrate 11 on both sides of ...

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Problems solved by technology

[0006] The present application provides a floating-gate split-gate flash memory device structure and its manufacturing method, which are used to solve the problem in the related art that the reduction of the size of the split-gate structure will easily cause short channel effects

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