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A multi-channel DMA measurement and control signal transmission method

A multi-channel, signal technology, used in telemetry and remote control related, ranging fields, can solve problems such as low real-time performance, achieve the effect of strong fault tolerance, avoid aliasing use, and improve storage capacity

Active Publication Date: 2021-05-25
10TH RES INST OF CETC
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AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to provide a high data transmission rate, strong fault tolerance, and high real-time processing efficiency of multi-channel DMA transmission to solve the problems of data transmission rate and To solve the problem of low real-time performance, improve the real-time response performance of the whole system

Method used

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  • A multi-channel DMA measurement and control signal transmission method
  • A multi-channel DMA measurement and control signal transmission method

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Embodiment Construction

[0015] refer to figure 1. According to the present invention, first of all, the ZYNQ chip connected to the external device data bus is used as the main control chip in the measurement and control system, and a PS unit with an external DDR chip is built in the main control chip. The PS unit is connected to the Ethernet device through Ethernet TCP, and the external device data After being processed by the PL unit cache, use AXI-Bus to write to the PS external DDR. Then, the DMA read-write control unit realizes the data interaction between the PS unit and the PL by means of direct memory DMA. The DDR chip on the PS side is divided into multiple channels of first-in-first-out queue FIFO data. The FIFO data of each channel corresponds to a different type of data transmission, and multiple data circular buffer blocks of the same size form the data of each channel; Secondly, the enqueue pointers of the PS end and the PL end are realized by means of Bram_Ctrl. The DMA read and writ...

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Abstract

The invention discloses a multi-channel DMA measurement and control signal transmission method, and aims to provide a DMA transmission method which is high in data transmission rate, high in fault-tolerant capability and high in real-time processing efficiency. According to the technical scheme, after external equipment data are cached through a PL unit, the external equipment data are written into a PS plug-in DDR through an AXI-Bus. And the PL enqueue pointer is updated for notifying the PS unit through interruption. And the PS unit reads the data with the corresponding length from the DDR according to the difference value between the dequeue pointer of the PS end and the enqueue pointer written by the PL. And after data acquired by the PS unit through the Ethernet is written into the DDR, a PS enqueue pointer is updated. The PL unit detects that the PS enqueue pointer changes, obtains the length of data forwarded by the PS end in the round according to the difference value between the PL end dequeue pointer and the enqueue pointer written by the PS, reads the data with the corresponding length from the DDR, and sends the data to the external equipment through the data bus.

Description

technical field [0001] The invention relates to a method for transmitting measurement and control signals through multi-channel direct memory access DMA (DirectMemoryAccess) in the related fields of distance measurement, telemetry and remote control. Background technique [0002] Data transmission in DMA mode is an important technology used in computer application systems to improve data transmission rate and microprocessor usage efficiency. DMA is a mechanism for quickly transferring data, which is implemented by a DMA controller (DMA controller, DMAC). The application of DMA can effectively reduce the burden on the processor, and can greatly improve the efficiency of data transmission, thereby improving system performance. Direct memory access DMA refers to a transmission method that directly exchanges a large amount of data information between I / O devices and memory without the intervention of the CPU during data transmission. It is a hardware device that replaces the C...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/28G06F12/0853
CPCG06F13/282G06F12/0853
Inventor 朱道山高逸龙丘国生邵龙费霞马力科
Owner 10TH RES INST OF CETC
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