A kind of fpga hardware implementation method, device and target tracking method of particle filter based on Bayesian resampling
A technology of particle filtering and hardware implementation, which is applied to digital computer parts, architecture with a single central processing unit, instruments, etc., can solve the problems of not being suitable for particle application scenarios, low parallelism of multi-core CPUs, and affecting the effect of particle filtering. To achieve the effect of ensuring sufficiency and diversity, improving the calculation speed of the system, and avoiding numerical instability
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[0027] The following is a detailed description of the embodiments of the present invention. This embodiment is carried out based on the technical solution of the present invention, and provides detailed implementation methods and specific operation processes to further explain the technical solution of the present invention.
[0028] The embodiment of the present invention provides a kind of FPGA hardware implementation method based on Bayesian resampling of particle filter, wherein FPGA such as Figure 4 As shown, including: a calculation module, a pseudo-random permutation generator, n random number generators, n particle cache blocks, n weight cache blocks, n index cache blocks and observation value cache blocks, the calculation module includes There are n particle sampling units, n weight updating units and n Bayesian resampling units in one-to-one correspondence between input and output; the FPGA hardware implementation method specifically includes the following steps:
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