Clock synchronization abnormity monitoring method and device and computer readable storage medium
An anomaly monitoring and clock synchronization technology, applied in the direction of fault location, etc., can solve problems such as timeliness and poor reliability
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Embodiment 1
[0064] This embodiment provides a clock synchronization anomaly monitoring method, which is used to monitor clock synchronization anomalies among power quality monitoring devices in a power grid.
[0065] refer to figure 1 The clock synchronization abnormality monitoring method provided in this embodiment includes the following steps:
[0066] Step S100, acquiring voltage sag waveforms monitored by each power quality monitoring device in the power grid.
[0067] Each power quality monitoring device can detect data in the power grid in real time, and once a transient disturbance event (such as a voltage sag) occurs, each power quality monitoring device can record the voltage sag waveform in real time. Since the moment when the transient disturbance event occurs is certain, if there is no abnormal clock synchronization problem among the power quality monitoring equipment, then the starting time of the voltage sag waveform monitored by each power quality monitoring equipment sho...
Embodiment 2
[0147] This embodiment provides a clock synchronization anomaly monitoring device, which is used to monitor the clock synchronization anomalies among power quality monitoring devices in a power grid.
[0148] refer to Figure 11 , the clock synchronization anomaly monitoring device provided in this embodiment includes an acquisition unit 20 , a screening unit 22 and a determination unit 24 .
[0149] The acquisition unit 20 is used to acquire the voltage sag waveform monitored by each power quality monitoring equipment in the power grid;
[0150] The screening unit 22 is used to screen homologous voltage sag waveforms from various voltage sag waveforms, and the homologous voltage sag waveform is a waveform corresponding to a voltage sag caused by the same power grid transient disturbance event;
[0151] The determination unit 24 is configured to determine whether the clock synchronization between the corresponding power quality detection devices is abnormal based on the volta...
Embodiment 3
[0155] The embodiment of the present application also provides a computer device, such as Figure 12 As shown, the computer device includes a memory 100 and a processor 200 . Wherein, the memory 100 and the processor 200 are communicatively connected to each other, and may be connected through a bus or in other ways, Figure 12 Take connection via bus as an example.
[0156] The processor 200 may be a central processing unit (Central Processing Unit, CPU). The processor 200 may also be other general-purpose processors, digital signal processors (Digital Signal Processor, DSP), application-specific integrated circuits (Application Specific Integrated Circuit, ASIC), field-programmable gate array (Field-Programmable Gate Array, FPGA) or Other chips such as programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or combinations of the above-mentioned types of chips.
[0157] As a non-transitory computer-readable storage medium, the ...
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