Reconfigurable radar receiving channel synthesis control device

Abstract

The invention discloses a reconfigurable radar receiving channel synthesis control device. The reconfigurable radar receiving channel synthesis control device comprises a main control chip, a programmable logic circuit device and a processing unit, wherein the main control chip is an external chip, and the programmable logic circuit device and the processing unit are realized by adopting the same FPGA, the main control chip carries out gating and operational symbol parameter configuration on each path of received AD chip data according to task requirements, and the processing unit analyzes the parameter configuration of the main control chip on the N paths of AD chip data; and data addition and subtraction and difference processing in gating channels in the N paths of AD chip data is completed through the programmable logic circuit device. Therefore, radar receiving channel synthesis control is realized. According to the device, the design complexity is reduced; and the defect of poor adaptability of a simulation mode is overcome; and the device has important significance in the aspects of reducing hardware space, reducing equipment cost and power consumption, improving system reliability and the like.

Description

technical field [0001] The invention belongs to the field of radar digital signal processing, and relates to a reconfigurable radar receiving channel synthesis control device. Background technique [0002] Channel synthesis control processing is an indispensable step in the radar seeker signal processing process. The radar echo data is processed by channel synthesis before forming the road data, azimuth difference data, and pitch difference data, which is the prerequisite for the radar to have functions such as angle measurement. [0003] The traditional channel synthesis processing method adopts the analog synthesis control method, that is, the radar receiver uses analog electronic devices to perform sum and difference processing on the radar echo data, and then sends the processed results to the digital signal processing extension. The AD chip on the digital signal processing extension samples the data and transmits the sampling result to the FPGA, and the FPGA completes ...

AI Technical Summary

Problems solved by technology

The method of analog channel synthesis control usually has the disadvantages of complex circuit design, large number of devices, single function, and poor adaptability, which has been difficult to meet the needs of modern radars, especially radar seekers.

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