Vertical power transistor and method for producing the vertical power transistor

Abstract

The invention relates to a vertical power transistor (1) having a semiconductor substrate (2) which is composed of a first semiconductor material and has at least one epitaxial layer (3), wherein a trench structure extends from a surface of the semiconductor substrate (2) into the interior of the at least one epitaxial layer (3), characterized in that the trench structure has first regions (13) which each extend from a trench bottom up to a specific height of the respective trench, wherein: the first regions (13) comprise first sub-regions, each having a first depth (t1) and a first width (w1); the first sub-regions extend substantially perpendicularly to the surface of the semiconductor substrate (2); the first regions (13) comprise second sub-regions, each having a second depth and a second width (w2); the second sub-regions have a first angle of inclination relative to the surface of the semiconductor substrate (2); the first regions (13) comprise third sub-regions, each having a third depth and a third width; the third sub-regions have a second angle of inclination relative to the surface of the semiconductor substrate (2); and the first regions (13) are electrically conductively connected to a source terminal.

Description

technical field [0001] The present invention relates to a vertical power transistor with a specifically shaped trench structure and a method for manufacturing a vertical power transistor. Background technique [0002] In vertical power transistors, the shielding of the gate oxide against high field strengths is problematic when a high positive voltage is applied between drain and source in blocking operation and in the event of a short circuit. Furthermore, the limitation of the short-circuit current is difficult. [0003] Various possibilities for shielding the gate oxide are known from the prior art. One possibility is to embed or excavate p-doped regions in the epitaxial layer below the trench structure of the power transistor. The p-doped region is electrically connected to the source region of the power transistor. Due to the position of the p-doped region below the MIS head, the p-doped region shields the MIS head from high field strengths and significantly contribu...

AI Technical Summary

Problems solved by technology

[0006] Disadvantages here are that high energy must be used for deep implantation, thereby causing high costs, leading to severe damage to the semiconductor crystal, and lateral ion scattering changing the field scale (Pitchmaβ)

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