Low-voltage line detection terminal based on xml file to realize automatic topology recognition

Abstract

The invention discloses a low-voltage line detection terminal for realizing automatic topology identification based on an XML file. The system comprises a monitoring terminal, a harmonic positioning module, a data freezing module, an information transmission module, a monitoring branch terminal, a power supply module, a prompt module, a line loss analysis module, a self-detection module, a power grid quality module, an electric energy calculation module, a system clock module, a wireless temperature detection module, a function detection module, a fault positioning module and an electric powernumerical value measurement module. The monitoring terminal is connected with the data freezing module, the harmonic positioning module and the information transmission module through cables, wireless and networks respectively, and the monitoring branch terminal is connected with the power supply module, the prompt module, the line loss analysis module, the self-detection module, the power grid quality module and the electric energy calculation module through cables, wireless and networks respectively. The low-voltage line detection terminal for realizing the automatic topology identificationbased on the XML file has the advantages of reducing the participation degree of people, being simple in work and being rapid in problem and error correction.

Description

technical field [0001] The invention relates to the technical field of low-voltage lines, in particular to a low-voltage line detection terminal for realizing automatic topology identification based on XML files. Background technique [0002] At present, when implementing the electrical topology in the station area, it is necessary to correspond to the name of each level. How is it done? The first step is to set the address of the device layer, and use a computer or other tools to record the corresponding relationship between the address and the device name; second. The first step is to form all the device addresses into the interconnection address, and then report all the interconnection addresses to the intelligent gateway, and the intelligent gateway will upload the information to the master station; the third step is to determine the addresses of the adjacent two layers, and after all the adjacent two-layer addresses are determined Report their respective hierarchical re...

AI Technical Summary

Problems solved by technology

This kind of recording method requires too much human participation, and the work is complicated and easy to make mistakes. After making mistakes, we don’t know how to correct them. We need a processing method that automatically matches our own name and address, which can be automatically generated without manual records, so that The automatically generated topology automatically generates the device name

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