Oscillation module and chip electrifying method

Abstract

The invention relates to the technical field of semiconductor integrated circuits, in particular to an oscillation module and a chip electrifying method. The oscillation module comprises a first oscillation unit and a second oscillation unit which are cascaded, wherein the first oscillation unit is used for outputting a first clock signal when receiving a first trigger signal and generating a second trigger signal when the number of pulses of the first clock signal reaches a first threshold value; and the second oscillation unit is used for outputting a second clock signal to an integrated circuit system when receiving the second trigger signal and generating a third trigger signal when the number of pulses of the second clock signal reaches a second threshold value, and the third triggersignal is used for controlling the first oscillation unit to stop outputting the first clock signal. According to the oscillation module provided by the invention, the reset failure of the integratedcircuit can be avoided while low-voltage starting is realized, so that the electrifying power consumption of the integrated circuit system is effectively controlled.

Description

technical field [0001] The present application relates to the technical field of semiconductor integrated circuits, in particular to an oscillation module and a chip power-on method. Background technique [0002] In the field of semiconductor integrated circuit technology, the power-on process of the system is a process of slowly climbing the power supply voltage. During this process, the integrated circuit system remains static until the power supply voltage reaches a predetermined voltage, and the power-on reset (POR: Power OnReset) circuit will release The POR signal initializes the integrated circuit system, and after the initialization is completed, the integrated circuit starts to work normally. [0003] However, when the power-on reset circuit releases the POR signal, there will be a problem that the voltage reached by the power supply is lower than the voltage that can ensure the normal operation of the integrated circuit system. Taking the slow power-on process of ...

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Problems solved by technology

[0003] However, when the power-on reset circuit releases the POR signal, there will be a problem that the voltage reached by the power supply is lower than the voltage that can ensure the normal operation of the integrated circuit system

Taking the slow power-on process of an integrated circuit system whose normal working voltage is a high-voltage threshold (1.65V to 5.5V) as an example, when the power-on reset circuit releases the POR signal, the minimum voltage reached by the power supply voltage is about 1V, which will affect the integrated circuit. The normal reset of the circuit system adversely affects the

[0004] Related technologies usually use a ring oscillator to wait for the power supply voltage to reach the normal operating voltage, but the duty cycle accuracy of the clock signal generated by the ring oscillator is poor, and its power consumption varies greatly with the power supply voltage

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