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Chip voltage configuration method and related device

A configuration method and chip technology, which can be used in measuring devices, measuring electricity, measuring electrical variables, etc., can solve problems such as voltage waste

Inactive Publication Date: 2020-08-04
GUANGDONG OPPO MOBILE TELECOMM CORP LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, for chips on the dividing line between the two grades, i.e. knife-edge chips, the actual minimum working voltage of these knife-edge chips will be slightly lower than the minimum working voltage of the grade, or the maximum operating frequency of the blade-edge chips will be higher than the highest working frequency of the grade. Frequency, at this time, if the DVFS strategy corresponding to this level is still used to process the chip, voltage will be wasted

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  • Chip voltage configuration method and related device

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Embodiment Construction

[0025] In order to make those skilled in the art better understand the solutions of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only It is a part of the embodiments of the present application, but not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0026] The terms "first", "second" and the like in the description and claims of the present application and the above drawings are used to distinguish different objects, rather than to describe a specific order. Furthermore, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive incl...

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Abstract

The invention provides a chip voltage configuration method and a related device, and the method comprises the steps: firstly determining a target test item according to the characteristics of a targetchip, the target test item being used for testing the performance of the target chip, and the performance comprising a chip rate; then, determining M lowest working voltages of the target chip underN power frequencies according to the target test item, wherein M is a positive integer, and N is a positive integer larger than or equal to M; and finally, determining a target voltage configuration strategy according to the M lowest working voltages of the target chip. The most suitable voltage configuration strategy can be provided for each chip based on the lowest working voltage of each chip,the differentiation of the voltage regulation strategy of each chip is realized, and the power consumption is saved.

Description

technical field [0001] The present application relates to the technical field of integrated circuits, and in particular, to a chip voltage configuration method and related devices. Background technique [0002] With the development of technology, the application of chips is becoming more and more extensive, and the requirements for chip quality are becoming more and more precise. The division of speed grades of chips can improve the work efficiency of chips. Divide chips with similar processing rates into the same level, and chips of the same level have the same minimum operating voltage, and adopt the same dynamic voltage and frequency scaling (DVFS) strategy for processing. [0003] However, for the chips on the dividing line between the two grades, that is, the blade edge chips, the actual minimum working voltage of these blade edge chips will be slightly lower than the minimum working voltage of the grade, or the maximum operating frequency of the blade edge chip will be...

Claims

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Application Information

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IPC IPC(8): G06F1/3296G01R31/28
CPCG06F1/3296G01R31/2851
Inventor 刘君
Owner GUANGDONG OPPO MOBILE TELECOMM CORP LTD
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