Super junction device and manufacturing method thereof

Abstract

The invention discloses a super junction device which is characterized in that a device unit region comprises a super junction consisting of P-type columns and N-type columns which are alternately arranged, and the P-type columns are formed by filling grooves; a P-type body region is formed by superposing a first P-type doped region and a second P-type doped region, and the first P-type doped region is formed through ion implantation and annealing propulsion before the P-type column is formed, so that the depth of the first P-type doped region can be deepened without being limited by the process of the super junction, and the junction depth of the P-type body region is deepened; the second P-type doped regions are formed at the two sides of the gate structure in a comprehensive ion implantation self-alignment manner, and the second P-type doped regions are used for adjusting the threshold voltage of a formed channel. The invention further discloses a manufacturing method of the super junction device. According to the invention, the depth of the body region can be increased, and the adverse effect of the surface defect of the super junction can be shielded, so that the yield is improved, and the influence on the performance and the threshold voltage of the super junction can be avoided.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a super junction device. The invention also relates to a manufacturing method of a super junction device. Background technique [0002] The super junction is composed of alternately arranged P-type thin layers also called P-type pillars (Pillar) and N-type thin layers also called N-type pillars formed in the semiconductor substrate. Devices using super junctions are super junction devices such as super junction devices. junction MOSFET. The internal reduced surface electric field (Resurf) technology using P-type thin layer and N-type thin layer charge balance can increase the reverse breakdown voltage of the device while maintaining a small on-resistance. [0003] The pillar structure of the PN interval of the super junction is the biggest feature of the super junction. Currently, there are mainly two methods for manufacturing the pillar structure ...

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Problems solved by technology

[0007] In order to shield the influence of surface defects of the super junction, a deep P-type body region is required, but a deep P-type body region requires a large thermal process, that is, the temperature of thermal annealing will be high and the time will be long; but after the columnar structure is formed, it is not expected Due to a large thermal process, because a large thermal process will cause the impurities of the P-type column and the N-type column in the columnar structure to diffuse and compensate each other to reduce the net doping concentration, which will lead to a significant decline in device performance

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