Layout structure of operational amplifier in pipelined analog-to-digital converter

Abstract

The invention discloses a layout structure of an operational amplifier in a pipelined analog-to-digital converter. The structure comprises two parts of module units in mirror symmetry, each module unit comprises a main operational amplifier, an auxiliary operational amplifier and a bias module. The parallel connection of all mos tubes adopts a finger value, the source and drain ends of the upper and lower mos tubes of the main operational amplifier are on the same line, the number of the parallel connection of all the mos tubes in the operational amplifier is an even number, and the W values of the auxiliary operational amplifier, the bias module and the mos tubes in the main operational amplifier are consistent. Dummy tubes are added into the main operational amplifier, the auxiliary operational amplifier and the bias module to fill the blank in the layout so as to ensure that the current is not lost. According to the layout structure, parasitic capacitance caused by signal lines andperipheral wiring can be reduced, process mismatch caused by loose layout is reduced by adopting centralized layout, and the process environment consistency of each mos tube is ensured.

Description

technical field [0001] The invention belongs to the field of chip design, and in particular relates to a layout structure of an operational amplifier in a pipeline analog-to-digital converter. Background technique [0002] An analog-to-digital converter (ADC) is a circuit that converts an analog signal into a digital signal. In the fields of test and measurement instruments, high-speed data acquisition, mobile communications, optical communications, and broadband radar, analog-to-digital converters play an important role. As one of the most important basic circuit units in analog integrated circuits, operational amplifiers An important factor affecting the performance of analog integrated circuits. With the rapid development of today's process technology, transistors are getting smaller and faster, while realizing low-cost, high-performance and multi-functional applications, it is also accompanied by a series of problems, because the process size is small, the chip on the c...

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Problems solved by technology

[0003] The purpose of the present invention is to provide a layout structure of an operational amplifier in a pipelined analog-to-digital converter, which can reduce The parasitic capacitance caused by the signal line and the surrounding wiring adopts a centralized layout to reduce the process mismatch caused by the loose layout and ensure that the process environment of each mos tube is consistent. This layout structure is very suitable for application in high-speed and high-precision ADC chips

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