Array substrate and display panel

Abstract

The invention discloses an array substrate and a display panel. The array substrate is provided with a plurality of data lines, scanning lines, clock signal lines and pixel units, wherein each pixel unit is composed of a plurality of crossing data lines and scanning lines; the data line is arranged between two adjacent columns of pixel units, the scanning line is arranged between two adjacent rowsof pixel units; and the part of the clock signal line, which is positioned in an opening area of the pixel units, is arranged in an orthographic projection area of a main electrode, is parallel to the data line, and is positioned in a different film layer from the pixel electrodes; the beneficial effects are that: the part, positioned in the pixel unit opening area, of the clock signal line is arranged in an orthographic projection area of a main electrode, parallel to the data lines and positioned on different film layers from the pixel electrodes, so that the signal lines do not occupy morewiring space in the display panel, the loss of the effective area of the opening area of the pixel unit is not caused, the distance between the clock signal lines and the data lines is increased, theclock signal lines and the data lines are prevented from being coupled, and the stability of the data lines is prevented from being influenced.

Description

technical field [0001] The present application relates to the field of communication technology, in particular to the field of display, and in particular to an array substrate and a display panel. Background technique [0002] In the signal line wiring of the existing GOA (Gate on Array, gate drive circuit substrate) circuit, the voltage and frequency of the clock signal line are generally relatively high, and in order to further reduce the borders on the left and right sides of the display panel, the The clock signal traces are the same as the data lines, they are arranged between the pixel units, and the distance is relatively short, so it is easy to cause the clock signal traces to interfere with the data lines, couple, etc., resulting in data line numbers instability; if the clock signal routing and the data line are arranged at a certain distance, firstly, more space is required, and secondly, the effective area of ​​the pixel unit opening area is greatly lost. [0003...

AI Technical Summary

Problems solved by technology

[0004] Embodiments of the present application provide an array substrate and a display panel, which are used to solve the problems in the prior art that interference and coupling are likely to occur when the distance between the clock signal traces and the data lines in the display panel is short. Affect the stability of the data line; when the distance between the clock signal line and the data line is relatively long, the signal line occupies more space on the display panel, resulting in the loss of the effective area of ​​the pixel unit opening area

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