PHY parameter debugging method and device, storage medium and electronic equipment

A technology of parameter debugging and memory, applied in the computer field, can solve the problem of PCIe PHY not running normally

Active Publication Date: 2020-04-21
JIANGSU XINSHENG INTELLIGENT TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The current parameter information of the PCIe PHY may not match the new motherboard, resulting in the failure of the PCIe PHY to operate normally

Method used

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  • PHY parameter debugging method and device, storage medium and electronic equipment
  • PHY parameter debugging method and device, storage medium and electronic equipment
  • PHY parameter debugging method and device, storage medium and electronic equipment

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Embodiment Construction

[0026] In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments It is a part of the embodiments of this application, not all of them. The components of the embodiments of the application generally described and illustrated in the figures herein may be arranged and designed in a variety of different configurations.

[0027] Accordingly, the following detailed description of the embodiments of the application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely represents selected embodiments of the application. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art w...

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Abstract

The invention provides a PHY parameter debugging method and device, a storage medium and electronic equipment. When the processor obtains an initialization loading completion indication signal, the processor starts to modify the data in the static random access memory; when the data in the static random access memory is modified, the processor sends a first trigger instruction to the PCIe PHY, thePCIe PHY is enabled to read the data from the static random access memory, and is used for executing a calibration and adaptive algorithm of each channel in a PCIe PHY, the PCIe PHY is matched with the currently installed mainboard, so that the PCIe PHY can be normally started and operated, the problem that PHY parameters cannot be adjusted due to the fact that data in a read-only memory cannot be modified in the prior art is solved, and the PCIe PHY can be matched with more mainboard equipment.

Description

technical field [0001] The present application relates to the field of computer technology, in particular, to a PHY parameter debugging method, device, storage medium and electronic equipment. Background technique [0002] PCIe (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard, proposed by Intel in 2001, is the third generation of high-speed serial bus, designed to replace the old PCI, PCI-X, AGP bus standards. Since its introduction, PCIe has been widely used in personal computers, servers, solid-state drives, data centers and other fields with its fast transmission rate, end-to-end reliable transmission, support for hot plugging, power management, and quality of service. [0003] When the chip with PCIe function is replaced to a different motherboard. The current parameter information of the PCIe PHY may not match the new motherboard, resulting in the failure of the PCIe PHY to operate normally. Contents of the invention ...

Claims

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Application Information

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IPC IPC(8): G06F13/38G06F13/42
CPCG06F13/385G06F13/4282G06F2213/0026
Inventor 刘海亮
Owner JIANGSU XINSHENG INTELLIGENT TECH CO LTD
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