Method for realizing interrupt response by using BMC on Feiteng platform
A platform and external interrupt technology, applied to the architecture with a single central processing unit, general-purpose stored program computers, instruments, etc., can solve problems such as CPU performance bottlenecks, and achieve the effect of simple implementation
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[0023] The present invention provides a method for implementing interrupt response using BMC on the Feiteng platform:
[0024] The Feiteng platform CPU and BMC establish communication through CPLD. The BMC configures the GPIO pins as interrupt pins. The interrupt pins monitor external interrupt signals, and send the interrupt signals and corresponding interrupt conditions to the Feiteng platform CPU through the BMC.
[0025] The interrupt pins perform corresponding interrupt response control operations according to the default processing command or the interrupt processing command issued by the Feiteng platform CPU.
[0026] At the same time, a Feiteng platform that uses BMC to implement interrupt response corresponding to the above is provided. The Feiteng platform CPU and BMC establish communication through CPLD, and the BMC configures GPIO pins as interrupt pins. Send the interrupt signal and the corresponding interrupt situation to the Feiteng platform CPU,
[0027] The i...
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