Pg pin power-on timing rationality detection method, system and related components

A technology of power-on sequence and detection method, which is applied in the field of circuits, and can solve problems affecting the normal operation of the system and subsequent circuit misoperations.

Active Publication Date: 2020-11-10
INSPUR SUZHOU INTELLIGENT TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, from image 3 It can be seen that the PG signal actually starts to rise from point a, and there is a voltage rise of about 1.2V when it reaches point b. Since the PG signal needs to be used as the Enable signal of the subsequent circuit, 1.2V may be higher than the Enable signal of the subsequent chip. Critical value, which may cause malfunction of subsequent circuits, thereby affecting the normal operation of the system

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  • Pg pin power-on timing rationality detection method, system and related components
  • Pg pin power-on timing rationality detection method, system and related components
  • Pg pin power-on timing rationality detection method, system and related components

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Embodiment Construction

[0054] The core of the present invention is to provide a method for detecting the rationality of the power-on sequence of the PG pin, which can effectively determine whether the power-on sequence of the PG pin in the VR chip is reasonable, and avoid malfunctions of subsequent circuits.

[0055] In order to enable those skilled in the art to better understand the solution of the present invention, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. Apparently, the described embodiments are only some of the embodiments of the present invention, but not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0056] In view of the abnormal power-on timing of the PG pin in the VR chip, the applicant first verified whether the abnorm...

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Abstract

The invention discloses a method for detecting the rationality of the power-on sequence of a PG pin, comprising: obtaining the pull-up level of the PG pin of a VR chip; determining that the current value injected into the VR chip when the pull-up level is equal to VR When the maximum withstand current of the chip is reached, the value of the pull-up resistor of the PG pin is used as the first resistance value; the equivalent resistance to ground when the PG pin is low is obtained, and based on the equivalent resistance to ground, the PG When the output voltage of the pin is equal to the preset interference voltage limit value, the value of the pull-up resistor of the PG pin is used as the second resistance value; when it is judged that the actual resistance value of the pull-up resistor is lower than the first resistance value or lower At the second resistance value, the first prompt information is output. By applying the solution of the present application, it can be determined whether the power-on sequence of the PG pin in the VR chip is reasonable, so as to avoid subsequent circuit malfunctions. The application also provides a detection system and related components for the rationality of the power-on sequence of the PG pin, which have corresponding effects.

Description

technical field [0001] The invention relates to the field of circuit technology, in particular to a method, system and related components for detecting the rationality of power-on timing of a PG pin. Background technique [0002] Whether the power chip can supply power safely and reliably is crucial to the performance of the product, among which, the correct power-on sequence is the premise of safe and reliable power supply. [0003] The Power Good signal is a key signal in the VR (Voltage regulator, power supply module) chip. This signal has two main functions. One is to feed back the working status of the power supply to the relevant control chip, and the other is to be used as Enable for other power supply chips. signal, so that the power supply can be powered on according to the designed sequence. Therefore, if the PG signal is abnormal during power-on, it will affect the normal operation of the system. [0004] The PG signal pin of the existing VR chip is usually an o...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F1/26H03K17/12H03K17/22
CPCG06F1/26H03K17/12H03K17/22H03K19/1774H03K19/01742H03K17/223
Inventor 王健
Owner INSPUR SUZHOU INTELLIGENT TECH CO LTD
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