Method and system for detecting rationality of power-on time sequence of PG pin, and related components

Abstract

The invention discloses a method for detecting rationality of a power-on time sequence of a PG pin. The method comprises the following steps: acquiring a pull-up level of the PG pin of a VR chip; determining the value of a pull-up resistor of the PG pin as a first resistance value when the current value of the pull-up level injected into the VR chip is equal to the maximum withstand current of theVR chip; acquiring equivalent resistance to ground when the PG pin is at a low level, and calculating a value of a pull-up resistor of the PG pin as a second resistance value based on the equivalentresistance to ground when the output voltage of the PG pin is equal to a preset interference voltage limit value; and when it is judged that the actual resistance value of the pull-up resistor is lower than the first resistance value or the second resistance value, outputting first prompt information. By means of the scheme, whether the power-on time sequence of the PG pin in the VR chip is reasonable or not can be determined, and misoperation of a subsequent circuit is avoided. The invention also provides a system for detecting the rationality of the power-on time sequence of the PG pin and arelated assembly. The system and the assembly have corresponding effects.

Description

technical field [0001] The invention relates to the field of circuit technology, in particular to a method, system and related components for detecting the rationality of power-on timing of a PG pin. Background technique [0002] Whether the power chip can supply power safely and reliably is crucial to the performance of the product, among which, the correct power-on sequence is the premise of safe and reliable power supply. [0003] The Power Good signal is a key signal in the VR (Voltage regulator, power supply module) chip. This signal has two main functions. One is to feed back the working status of the power supply to the relevant control chip, and the other is to be used as Enable for other power supply chips. signal, so that the power supply can be powered on according to the designed sequence. Therefore, if the PG signal is abnormal during power-on, it will affect the normal operation of the system. [0004] The PG signal pin of the existing VR chip is usually an o...

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Problems solved by technology

However, from image 3 It can be seen that the PG signal actually starts to rise from point a, and there is a voltage rise of about 1.2V when it reaches point b. Since the PG signal needs to be used as the Enable signal of the subsequent circuit, 1.2V may be higher than the Enable signal of the subsequent chip. Critical value, which may cause malfunction of subsequent circuits, thereby affecting the normal operation of the system

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