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Self-defined instruction automatic identification method based on constraint planning

An automatic identification and self-defined technology, applied in model-driven code, program control design, instruments, etc., can solve the problems of long design cycle, high cost, and difficult debugging of hardware development for special chips, and achieve multi-objective optimization and improvement. The effect of performance, good versatility and flexibility

Active Publication Date: 2019-10-15
LIAONING TECHNICAL UNIVERSITY
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  • Abstract
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  • Application Information

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Problems solved by technology

[0005]In the early research, the application program was implemented efficiently by designing a dedicated chip, but the design cycle of the dedicated chip is long, hardware development is difficult to debug, and its cost is also very high

Method used

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  • Self-defined instruction automatic identification method based on constraint planning
  • Self-defined instruction automatic identification method based on constraint planning
  • Self-defined instruction automatic identification method based on constraint planning

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Embodiment Construction

[0053] The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.

[0054] A method for automatic identification of custom instructions based on constraint programming, including two parts: enumeration of custom instructions and selection of custom instructions;

[0055] The enumeration of the self-defined instruction is realized by establishing an enumeration constraint programming model of the self-defined instruction, and enumerating all subgraphs satisfying the constraint conditions from the data flow diagram, and the specific method is as follows:

[0056] In order to enumerate all self-defined instructions satisfying the given constraints from the data flow graph G(V, E), let the subgraph S=(Vs, Es) be the graphical representation of...

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Abstract

The invention provides a self-defined instruction automatic identification method based on constraint planning, and relates to the technical field of electronic design automation. The method comprisestwo parts of enumeration of a custom instruction and selection of the custom instruction. The enumeration of the custom instruction is realized by establishing an enumeration constraint programming model of the custom instruction and enumerating all sub-graphs meeting constraint conditions from the data flow graph. In the process, constraint conditions are modeled respectively. For an enumerationproblem, a constraint programming method is adopted to solve all custom instructions meeting the constraint conditions, so that enumeration of the custom instructions is completed. The selection of the custom instruction realizes multi-objective optimization by establishing a selection constraint programming model of the custom instruction. According to the process, a weight-based method is adopted to convert a multi-objective optimization problem into a single-objective optimization problem by establishing a maximized objective function of processor performance improvement and energy consumption reduction caused by a self-defined instruction.

Description

technical field [0001] The invention relates to the technical field of electronic design automation, in particular to a method for automatic recognition of self-defined instructions based on constraint programming. Background technique [0002] In recent years, in order to meet the growing demand of embedded applications for high performance and low power consumption, extended instruction sets are widely used in embedded systems. For example, Application Specific Instruction Processor (ASIP) combines general-purpose processors And the advantages of ASIC, provide a good compromise in terms of design cycle, flexibility, performance, and power consumption. The custom instructions in the extended instruction set realize chaining and parallelization between basic instructions by encapsulating a series of basic instructions, thereby improving performance. [0003] The extended instruction set for specific applications is the core link in the design of special instruction set proc...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F8/35G06F9/30
CPCG06F8/35G06F9/30003Y02D10/00
Inventor 肖成龙王珊珊王心霖
Owner LIAONING TECHNICAL UNIVERSITY
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