Rate self-adaptive LDPC decoder suitable for aerospace communication

Abstract

The invention discloses a rate self-adaptive LDPC decoder suitable for aerospace communication. The system comprises an input data processing module, an iterative decoding module and an output data processing module. The input data processing module comprises a frame synchronization detection unit, an FIFO memory and a null frame filling unit. A data stream is input into the frame synchronizationdetection unit, the frame synchronization detection unit performs frame synchronization detection on data and sends synchronized data frames into an FIFO memory, and an empty frame filling unit readsthe data frames from the FIFO memory or fills empty frames into an iterative decoding module according to full state marks and empty state marks of the FIFO memory. After the data is decoded by the iterative decoding module, the output data processing module performs hard decision on the iteratively decoded data and performs framing output. According to the invention, through filling the empty frame into the input data, the decoding operation of adaptively processing different rate data by a single master clock is realized.

Description

technical field [0001] The present application relates to error correction coding in the technical field of digital communication, in particular to a rate-adaptive LDPC decoder suitable for aerospace communication. Background technique [0002] Due to the influence of noise and interference during the transmission of digital signals, errors will occur. Channel coding technology is widely used in various communication systems as an effective means to ensure reliable transmission of information. Low-Density Parity Check Code (Low-Density Parity Check Code) , LDPC) was first proposed by Gallager, further research by Mackay et al. showed that the performance of LDPC codes can be close to the Shannon Limit (Shannon Limit) under the Belief Propagation decoding algorithm, and has a lower error platform, which is recommended by CCSDS One of the error-correcting codes for aerospace communications. [0003] LDPC code is a kind of linear block code, its parity check matrix is ​​a very...

AI Technical Summary

Problems solved by technology

[0006] Full parallel structure: by configuring a computing unit for each row (column) and making all the computing units work in parallel to improve the computing speed, it only takes 2 clock cycles to complete 1 iterative operation at least, but it needs to consume a lot of hardware resources , the chip is difficult to support

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