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Failure Analysis Method of 3D Memory

A failure analysis and memory technology, applied in the field of failure analysis of three-dimensional memory, can solve the problem of low accuracy of failure point positioning, achieve the effect of improving accuracy and positioning efficiency, and ensuring reliability

Active Publication Date: 2021-07-16
YANGTZE MEMORY TECH CO LTD
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0006] The invention provides a failure analysis method of a three-dimensional memory, which is used to solve the problem of low failure point positioning accuracy in the failure analysis process of the existing three-dimensional memory

Method used

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  • Failure Analysis Method of 3D Memory
  • Failure Analysis Method of 3D Memory
  • Failure Analysis Method of 3D Memory

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Embodiment Construction

[0040] The specific implementation of the failure analysis method for the three-dimensional memory provided by the present invention will be described in detail below in conjunction with the accompanying drawings.

[0041] In the failure analysis of three-dimensional memory chips, one of the main failure types is the leakage between the word line (Word Line) and the array common source (Array Common Source, ACS). Accurate and efficient physical analysis of this type of leakage Permanent failure analysis is of great significance to the improvement of 3D memory manufacturing process. However, in failure analysis, accurate location of the failure point is the key to this type of failure analysis. The current conventional failure analysis method is to extract the common source of the failed target word line and the array corresponding to the target word line, and perform hotspot location analysis.

[0042] A three-dimensional memory includes a plurality of storage areas arranged ...

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Abstract

The invention relates to the technical field of semiconductor manufacturing, in particular to a failure analysis method for a three-dimensional memory. The failure analysis method of the three-dimensional memory includes the following steps: providing a storage area, the storage area includes a plurality of array common sources arranged in parallel, there are plugs between adjacent array common sources, and the ends of the plugs are The part is used to electrically connect with the word line; obtain the position of the target plug electrically connected with the failed word line; form a connection line in the storage area, and the connection line is electrically connected to the common source of all arrays in the storage area; Leading out the contact of the target plug and a common source of the array to the outside of the three-dimensional memory, so as to analyze the location of the hot spot on the failed word line. The invention improves the accuracy and efficiency of hot spot positioning in the failure analysis process of the three-dimensional memory, and ensures the reliability of the failure analysis results of the three-dimensional memory.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a failure analysis method for a three-dimensional memory. Background technique [0002] With the development of planar flash memory, the production process of semiconductors has made great progress. However, in recent years, the development of planar flash memory has encountered various challenges: physical limits, existing development technology limits, and storage electron density limits. In this context, in order to solve the difficulties encountered in planar flash memory and pursue lower production costs per unit storage unit, various three-dimensional (3D) flash memory structures have emerged, such as 3D NOR (3D or not) flash memory and 3D NAND (3D NAND) flash memory. [0003] Among them, 3D NAND memory takes its small size and large capacity as the starting point, and the design concept of highly integrated storage units stacked in three-dimensional m...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/56
Inventor 鲁柳宋王琴张顺勇
Owner YANGTZE MEMORY TECH CO LTD
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