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U-Boot starting double-backup system

A u-boot, dual backup technology, applied in the direction of boot programs, program control devices, etc., can solve problems such as reducing system stability and reliability indicators, and achieve a high degree of customization, simple design, and high system stability. Effect

Inactive Publication Date: 2019-05-21
湖南泽天智航电子技术有限公司
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  • Summary
  • Abstract
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  • Claims
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AI Technical Summary

Problems solved by technology

[0004] In the traditional U-Boot startup, the CPU only reads the U-Boot startup code with a fixed address. Once this link fails during system operation, maintenance and debugging, it will lead to irreversible results and greatly reduce the System stability and reliability indicators

Method used

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  • U-Boot starting double-backup system

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Embodiment Construction

[0022] Such as figure 1 As shown, a U-Boot startup dual backup system includes the main controller CPU, FLASH, FPGA and dual backup design circuits, wherein the main controller CPU and FLASH communicate through the localbus bus, and the FPGA and the dual backup design circuits are respectively connected to the localbus The bus communicates, and the joint control selects the first address bit of the FLASH.

[0023] The role of the main controller CPU is to read the uboot startup code and data through the localbus bus. The storage space of FLASH is divided into two independent areas, and each area stores a relatively independent and complete U-Boot startup code. Add FPGA and hardware circuit between CPU and FLASH, the purpose is to make the first address of localbus bus can jump through the joint control of FPGA and hardware circuit, different first address corresponds to different FLASH storage space area, CPU can read different The U-Boot startup code, so as to achieve the p...

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Abstract

The invention discloses a U-Boot starting double-backup system. The system includes a main controller CPU, a FLASH, a FPGA and a hardware circuit. The main controller CPU is connected with the FLASH through a localbus bus. The FPGA and the hardware circuit are respectively connected with a localbus bus to jointly control the head address bit of the FLASH, the storage space of the FLASH is dividedinto two independent areas, and an independent and complete U-is stored in each area. Boot starting code, and U-of different areas can be read by controlling the signals of the head address of the address bus. Boot starting code is realized, so that U-is realized. Double backups of the Boot starting code are carried out. The device is simple in structure, high in reliability, easy to implement andgood in stability.

Description

technical field [0001] The invention relates to the field of real-time embedded technology, in particular to a U-Boot startup dual backup system. Background technique [0002] Embedded operating system (Embedded Operating System, referred to as: EOS) is a system software with a wide range of uses, usually including underlying hardware-related driver software, system kernel, device driver interface, communication protocol, graphical interface, standardized browser, etc. The embedded operating system is responsible for the allocation of all software and hardware resources of the embedded system, task scheduling, control and coordination of concurrent activities. It must reflect the characteristics of the system where it is located, and be able to achieve the functions required by the system by loading and unloading certain modules. The structure of the embedded system is divided into four areas, including Bootloader area, parameter area, kernel image area and file system area...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/4401
Inventor 唐兴吴淇赵治鹏
Owner 湖南泽天智航电子技术有限公司
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