Forming method for embedded flash memory structure

An embedded and flash memory technology, applied in the direction of electrical components, electrical solid-state devices, circuits, etc., can solve the problems of increased process costs and heavy etching workload

Active Publication Date: 2019-05-17
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Abstract
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  • Application Information

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Problems solved by technology

[0005] The purpose of the present invention is to provide a method for forming an embedded flash memory struc...

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  • Forming method for embedded flash memory structure
  • Forming method for embedded flash memory structure
  • Forming method for embedded flash memory structure

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Embodiment Construction

[0037] The specific implementation manner of the present invention will be described in more detail below with reference to schematic diagrams. Advantages and features of the present invention will be apparent from the following description and claims. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

[0038] In the following description, it will be understood that when a layer (or film), region, pattern or structure is referred to as being "on" a substrate, layer (or film), region and / or pattern, it can be directly on another layer or substrate, and / or intervening layers may also be present. Further, it will be understood that when a layer is referred to as being 'under' another layer, it can be directly under, and / or one or more intervening layers may also be present. In addition, designations regarding 'on...

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Abstract

The invention relates to a forming method for an embedded flash memory structure. The method comprises the steps that a substrate is provided, wherein the substrate comprises a storage region and a logic region; grid stacking layers are deposited on the substrate; a device structure is formed on the grid stacking layer of the storage region; first etching is performed, and the grid stacking layeron the logic region, the grid stacking layers on the side faces of the two ends of the device structure and the grid stacking layers at the two ends of the device structure are removed; and second etching is performed, wherein metal hole connection positions are reserved first, and then remaining control grid layers are removed. According to the method, the grid stacking layers are deposited on the storage region and the logic region at the same time; and by simultaneously removing the grid stacking layer on the logic region, the grid stacking layers at the ends of the device structure on thestorage region and the grid stacking layers around the ends of the device structure, the control grid layers connected to the ends of the device structure are cut off and redundant grid stacking layers are removed in the same process, therefore, etching steps are reduced, and process cost is saved.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a method for forming an embedded flash memory structure. Background technique [0002] In recent years, with the rapid development of the smart electronic product market, the use of various microcontrollers (micro controller units, MCU) and SoC chips has penetrated into all aspects of daily life such as automotive electronics, industrial control and medical products. And high-performance MCU or SoC products are inseparable from the support of high-performance embedded flash memory (embedded flash, E-flash) core. No matter in terms of chip area, system performance and power consumption, or in terms of manufacturing yield and design cycle, the leading role of embedded memory in SoC design is increasing. Embedded flash memory is a physical or electrical combination of existing flash memory and existing logic modules to provide more diverse performance. Flash memory (flash), as a safe...

Claims

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Application Information

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IPC IPC(8): H01L27/11531H01L27/11521
Inventor 李冰寒王哲献江红高超
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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