A fault response method and system for a semiconductor processing module

Abstract

The invention discloses a fault response method and system for a semiconductor processing module, and belongs to the field of semiconductor processing, and is used for enabling combination equipment to continue to work after undergoing a transient process under the condition that wafer residence time constraint is met, so as to solve the problem of low wafer processing efficiency. The method comprises the following steps: obtaining a stable scheduling method of the combination equipment in a stable state; Performing timeliness analysis on scheduling of the combined equipment when the processing module fails according to a stable scheduling method to obtain a timeliness analysis result; Rearranging a feasible scheduling method for the combined equipment according to the timeliness analysisresult and the wafer residence time constraint; Transmitting the feasible scheduling method to the robot; The robot schedules the processing module of the combined equipment in time according to the feasible scheduling method, so that the combined equipment can still work normally after experiencing a transient process of periodic scheduling before and after a fault, the processing of a wafer cannot be interrupted, and the processing efficiency of the wafer is improved.

Description

Technical field [0001] The invention relates to the field of semiconductor processing, and in particular to a method and system for responding to a failure of a semiconductor processing module. Background technique [0002] In the semiconductor manufacturing industry, combined equipment for manufacturing semiconductors is indispensable, and failures of the processing modules used to process semiconductors in the combined equipment often occur. In order to effectively operate the combined equipment to process semiconductors, timely and approved Appropriate ways to solve the above faults are very important. [0003] In the process of semiconductor processing, the wafer residence time constraint must be met to ensure the quality of some wafer processing. With the above restrictions, if the combined equipment is operated under periodic scheduling and the processing module fails, the combination is expected The equipment can still be operated under regular scheduling. [0004] However, ...

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Problems solved by technology

[0005] The main purpose of the present invention is to provide a fault response method and system for a semiconductor processing module, aiming to solve the problem in the prior art that it is difficult for combined equipment to continue to work after experiencing a transient process, resulting in low wafer processing efficiency question

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