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Flash memory and forming method thereof

A memory and flash technology, applied in the field of flash memory and its formation, can solve problems such as poor performance of split-gate flash memory, and achieve the effects of improving erasing efficiency, reducing channel resistance and improving performance

Active Publication Date: 2019-04-16
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, the performance of existing split-gate flash memory is poor

Method used

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  • Flash memory and forming method thereof
  • Flash memory and forming method thereof
  • Flash memory and forming method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0030] As mentioned in the background, the performance of the prior art flash memory is poor.

[0031] A structural schematic diagram of a flash memory, refer to figure 1 , including: a semiconductor substrate 100, the semiconductor substrate 100 includes a source line floating gate region I and a word line bit line region II, the source line floating gate region I is located between adjacent word line bit line regions II and Adjacent to the word line bit line region II; the floating gate structure 120 on the source line floating gate region I, the first spacer 130 on the floating gate structure 120, and the floating gate structure 120 and the first The source line layer 140 between the sidewalls 130; the source region 110 in the semiconductor substrate 100 located at the bottom of the source line layer 140; the word line structure located on the semiconductor substrate 100 in the word line bit line region II, the word line The line structure covers the sidewalls of the float...

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Abstract

The invention discloses a flash memory and a forming method thereof. The flash memory comprises a semiconductor substrate. The semiconductor substrate comprises a source line floating gate region anda plurality of word line bit line regions. The source line floating gate region is located between adjacent word line bit line regions. Each word line bit line region comprises a first word line bit line region and a second word line bit line region. The first word line bit line region is located between the second word line bit line region and the source line floating gate region. A floating gatestructure is positioned on the source line floating gate region semiconductor substrate. A first sidewall is arranged on the floating gate structure. A source line layer is positioned between the floating gate structure and the first side wall. A first word line structure is located on the first word line bit line region and comprises a first word line oxide layer. A second word line structure islocated on the second word line bit line area. The second word line structure comprises a second word line oxidation layer. The second word line oxidation layer covers the side wall of the first wordline structure and a second word line oxidation layer on the surface of the semiconductor substrate in the second word line bit line region. The performance of the flash memory is improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a flash memory and a forming method thereof. Background technique [0002] Flash memory is an important device in integrated circuit products. The main feature of flash memory is that it can keep stored information for a long time without applying voltage. Flash memory has the advantages of high integration, fast access speed and easy wiring, so it is widely used. [0003] Flash memory is classified into two types: stack gate flash memory and split gate flash memory. The stacked gate flash memory has a floating gate and a control gate above the floating gate. The stacked gate flash memory has the problem of over-supply lines. Different from the stacked gate flash memory, the split gate flash memory forms a word line as a source line gate on one side of the floating gate. The split-gate flash memory can effectively avoid the over-source line effect. [0004] Howeve...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11521H10B41/30
CPCH10B41/30
Inventor 余快董方亮梁肖
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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